一句话：提出面向 FPGA 的实用记录/重放方案 Vidi，为敏捷硬件开发提供关键基础工具。
FPGA 等异构计算设备正被用于加速数据中心与云工作负载，但硬件开发仍缺少类似软件那样支撑敏捷迭代的工具生态。记录与重放 FPGA 执行可作为关键基础，帮助开发者修复正确性缺陷、性能问题和安全漏洞。然而，为 FPGA 构建实用的 record/replay 工具十分困难：现有方法要么记录过多信息，要么记录过少，均无法支持真实世界执行。本文提出 Vidi，面向可重构硬件提供记录与重放能力，目标是在实际执行场景下解决这一两难。摘要未报告具体设计细节、实现与评估结果。
Developers are turning to heterogeneous computing devices, such as Field Programmable Gate Arrays (FPGAs), to accelerate data center and cloud computing workloads. FPGAs enable rapid prototyping and should facilitate an agile software-like development workflow to fix correctness bugs, performance issues, and security vulnerabilities. Unfortunately, hardware development still does not have a vast ecosystem of tools needed to support the agile hardware development vision. The capability to record and replay FPGA executions would constitute a key building block that will inspire the development of many tools, similar to what record/replay did for software. However, building a practical record/replay tool for FPGA is challenging; existing approaches either record too much or too little information and cannot support real-world executions.