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P2 Automatic Generation of Vectorizing Compilers for Customizable Digital Signal Processors

为可定制数字信号处理器自动生成向量化编译器
ASPLOS Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 12024匹配度 2/10 · 该论文属于编译器自动生成与等式饱和优化,未涉及 LLM/Agent、机器学习系统静态分析、浮点程序分析或贝叶斯程序分析,仅与 PL/编译器工程有边缘关联,因此匹配度低。引用 1 inbox
Samuel Thomas, James Bornholt
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:提出 Isaria 框架,从 ISA 规格自动合成重写规则,用等式饱和自动生成高性能向量化 DSP 编译器。

嵌入式 DSP 应用高度依赖向量化执行以取得最佳功耗性能折中,但为每个 DSP 架构或应用特定的 ISA 定制手写高性能向量化编译器是一项庞大且易错的投入。本文提出 Isaria:它从 ISA 规格中自动合成可靠(sound)的重写规则,而非人工编写;随后基于等式饱和(equality saturation)搜索向量化后的 DSP 代码,并自动发现规则中的阶段结构以提升编译性能,同时在编译期调度规则应用并剪枝搜索的中间状态。作者用 Isaria 为某工业级 DSP 架构生成编译器,所得 kernel 相比现有 DSP 库最高加速 6.9×,并与专家手工构建的编译器结果相当;此外 Isaria 还能通过自动生成高质量向量化编译器,加速对新 ISA 定制的探索。

问题
为每个新的 DSP 架构或应用特定的 ISA 定制,从零构建高性能向量化编译器代价高、易出错且需反复投入。
方法
Isaria 从 ISA 规格自动合成可靠的重写规则,利用等式饱和搜索向量化 DSP 代码,并发现规则的阶段结构、在编译期调度规则应用并剪枝中间状态。
评估
为工业级 DSP 架构自动生成编译器,生成的 kernel 相较现有 DSP 库最高提速 6.9×、与专家构建的编译器相当,并展示了加速新 ISA 定制探索的能力。
原文摘要(Abstract)

Embedded applications extract the best power-performance trade-off from digital signal processors (DSPs) by making extensive use of vectorized execution. Rather than handwriting the many customized kernels these applications use, DSP engineers rely on auto-vectorizing compilers to quickly produce effective code. Building these compilers is a large and error-prone investment, and each new DSP architecture or application-specific ISA customization must repeat this effort to derive a new high-performance compiler. We present Isaria, a framework for automatically generating vectorizing compilers for DSP architectures. Isaria uses equality saturation to search for vectorized DSP code using a system of rewrite rules. Rather than hand-crafting these rules, Isaria automatically synthesizes sound rewrite rules from an ISA specification, discovers phase structure within these rules that improve compilation performance, and schedules their application at compile time while pruning intermediate states of the search. We use Isaria to generate a compiler for an industrial DSP architecture, and show that the resulting kernels outperform existing DSP libraries by up to 6.9× and are competitive with those generated by expert-built compilers. We also demonstrate how Isaria can speed up exploration of new ISA customizations by automatically generating a high-quality vectorizing compiler.

链接与引用

DOI 原文 · PDF(开放获取) · DBLP

BibTeX
@inproceedings{ThomasB24,
  title = {Automatic Generation of Vectorizing Compilers for Customizable Digital Signal Processors},
  author = {Samuel Thomas and James Bornholt},
  booktitle = {ASPLOS},
  year = {2024},
  doi = {10.1145/3617232.3624873}
}