paperbot · PL 论文追踪

全部论文 待读 收藏

P2 Hydride: A Retargetable and Extensible Synthesis-based Compiler for Modern Hardware Architectures

Hydride:面向现代硬件架构的可重定向、可扩展的基于合成的编译器
ASPLOS Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 22024匹配度 2/10 · 该论文属于编译器代码生成与可重定向指令合成,虽涉及形式化语义和合成技术,但并未涉及用户关注的方向(LLM/Agent 与静态分析、浮点程序分析、贝叶斯程序分析)。它与 PL 相关,但更偏体系结构与编译器后端,匹配度较低。引用 10 inbox
Akash Kothari, Abdul Rafae Noor, Muchen Xu, Hassam Uddin, Dhruv Baronia, Stefanos Baziotis, Vikram Adve, Charith Mendis, Sudipta Sengupta
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:利用厂商伪代码规格自动合成可重定向指令与指令选择趟,为新兴硬件 ISA 构建可扩展编译器。

现代硬件架构为满足图像处理、深度学习等负载的性能需求,不断引入复杂多样的指令集,编译器难以持续跟进其内部抽象与可重定向代码生成能力。本文提出 Hydride:它从多个硬件 ISA 的厂商伪代码规格出发,自动为可扩展的编译器 IR(AutoLLVM IR)设计可重定向指令,并自动生成指令选择趟,把 AutoLLVM IR 下降至各目标 ISA;同时包含一个代码合成器,为 Halide 等基于调度的语言自动生成代码生成支持。实验表明,Hydride 仅用 397 条 AutoLLVM IR 指令即可表示 x86、Hexagon、ARM 上合计 3557 条指令(含 SSE2/SSE4/AVX/AVX2/AVX512、Hexagon HVX、ARM NEON)。基于 Halide IR 形式语义构建的新 Halide 编译器在深度学习与图像处理内核上,性能在 Hexagon 上持平成熟生产版 Halide,在 x86 上提升 8%、ARM 上提升 3%,并相较 Halide 的 LLVM 后端在 x86、HVX、ARM 上分别提升 12%、100% 和 26%。

问题
现代硬件架构指令集快速演化且日益复杂,编译器缺少可重定向的代码生成能力与可演化的内部抽象,难以跟上新兴 ISA。
方法
以厂商定义的伪代码 ISA 规格为输入,自动为可扩展的 AutoLLVM IR 设计可重定向指令并生成指令选择趟,同时用代码合成器为 Halide 等调度式语言自动生成代码生成支持。
评估
在 x86、Hexagon、ARM 上统计可表示的指令数量与所需 AutoLLVM IR 指令数,并用基于 Halide IR 形式语义构建的新 Halide 编译器,在深度学习与图像处理内核上与生产版 Halide 及其 LLVM 后端比较性能。
原文摘要(Abstract)

As modern hardware architectures evolve to support increasingly diverse, complex instruction sets for meeting the performance demands of modern workloads in image processing, deep learning, etc., it has become ever more crucial for compilers to provide robust support for evolution of their internal abstractions and retargetable code generation support to keep pace with emerging instruction sets. We propose Hydride, a novel approach to compiling for complex, emerging hardware architectures. Hydride uses vendor-defined pseudocode specifications of multiple hardware ISAs to automatically design retargetable instructions for AutoLLVM IR, an extensible compiler IR which consists of (formally defined) language-independent and target-independent LLVM IR instructions to compile to those ISAs, and automatically generated instruction selection passes to lower AutoLLVM IR to each of the specified hardware ISAs. Hydride also includes a code synthesizer that automatically generates code generation support for schedule-based languages, such as Halide, to optimally generate AutoLLVM IR. Our results show that Hydride is able to represent 3,557 instructions combined in x86, Hexagon, ARM architectures using only 397 AutoLLVM IR instructions, including (Intel) SSE2, SSE4, AVX, AVX2, AVX512, (Qualcomm) Hexagon HVX, and (ARM) NEON vector ISAs. We created a new Halide compiler with Hydride using only a formal semantics of Halide IR, leveraging the auto-generated AutoLLVM IR and back-ends for the three hardware architectures. Across kernels from deep learning and image processing, this compiler is able to perform just as well as the mature, production Halide compiler on Hexagon, and outperform on x86 by 8% and ARM by 3%. Hydride also outperforms the production Halide's LLVM back end by 12% on x86, 100% on HVX, and 26% on ARM across the same kernels.

链接与引用

DOI 原文 · PDF(开放获取) · DBLP

BibTeX
@inproceedings{KothariNXUBBAMS24,
  title = {Hydride: A Retargetable and Extensible Synthesis-based Compiler for Modern Hardware Architectures},
  author = {Akash Kothari and Abdul Rafae Noor and Muchen Xu and Hassam Uddin and Dhruv Baronia and Stefanos Baziotis and Vikram Adve and Charith Mendis and Sudipta Sengupta},
  booktitle = {ASPLOS},
  year = {2024},
  doi = {10.1145/3620665.3640385}
}