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P2 Avoiding Instruction-Centric Microarchitectural Timing Channels Via Binary-Code Transformations

通过二进制代码变换避免以指令为中心的微架构时序信道
ASPLOS Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 22024匹配度 2/10 · 论文研究的是二进制代码上的程序分析与变换,用于缓解微架构时序侧信道,属于安全/编译方向。虽然涉及程序分析,但与应用静态分析于 ML/Agentic、LLM 改进静态分析、浮点程序分析或贝叶斯程序分析等核心方向几乎没有交集。引用 9 inbox
Michael Flanders, Reshabh K Sharma, Alexandra E. Michael, Dan Grossman, David Kohlbrenner
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:提出分析/变换工具 cio,在二进制代码上自动检测并缓解未来指令中心微架构优化引入的时序侧信道。

随着摩尔定律放缓,以指令为中心的微架构优化可能引入新的时序侧信道。这类侧信道源于硬件而非源代码,传统常量时间编程难以消除。本文关注两类尚未部署的优化:静默存储(silent stores)在写无效时丢弃在途存储,从而泄漏待写秘密;计算简化(computation simplification)运行时短路平凡计算,泄漏算术操作数。传统常量时间技术无法处理寄存器溢出、地址计算和复杂指令微操作等泄漏点。为此,作者设计、实现并评估了 cio:一个面向密码代码、检测并缓解上述侧信道的分析与二进制变换工具/流程。在专用缓解不可用时,cio 可作为提供受验证缓解的后备方案。

问题
未来以指令为中心的微架构优化会引入新的时序侧信道;例如 silent stores 与 computation simplification 会泄漏秘密,且经典常量时间技术无法覆盖寄存器溢出、地址计算和复杂指令微操作等场景。
方法
作者构建程序分析与二进制代码变换工具,设计、实现 cio,用来自动检测并缓解密码代码中的上述侧信道,并将其定位为专用硬件/软件缓解(如微码补丁)缺位时的后备方案。
评估
作者对 cio 进行实现与评估,在密码代码中检测并缓解这些侧信道,目标是提供受验证的缓解。
原文摘要(Abstract)

With the end of Moore's Law-based scaling, novel microarchitectural optimizations are being patented, researched, and implemented at an increasing rate. Previous research has examined recently published patents and papers and demonstrated ways these upcoming optimizations present new security risks via novel side channels. As these side channels are introduced by microarchitectural optimization, they are not generically solvable in source code. In this paper, we build program analysis and transformation tools for automatically mitigating the security risks introduced by future instruction-centric microarchitectural optimizations. We focus on two classes of optimizations that are not yet deployed: silent stores and computation simplification. Silent stores are known to leak secret data being written to memory by dropping in-flight stores that will have no effect. Computation simplification is known to leak operands to arithmetic instructions by shortcutting trivial computations at execution time. This presents problems that classical constant-time techniques cannot handle: register spills, address calculations, and the micro-ops of complex instructions are all potentially leaky. To address these problems, we design, implement, and evaluate a process and tool, cio, for detecting and mitigating these types of side channels in cryptographic code. cio is a backstop, providing verified mitigation for novel microarchitectural side-channels when more specialized and efficient hardware or software tools, such as microcode patches, are not yet available.

链接与引用

DOI 原文 · PDF(开放获取) · DBLP

BibTeX
@inproceedings{FlandersSMGK24,
  title = {Avoiding Instruction-Centric Microarchitectural Timing Channels Via Binary-Code Transformations},
  author = {Michael Flanders and Reshabh K Sharma and Alexandra E. Michael and Dan Grossman and David Kohlbrenner},
  booktitle = {ASPLOS},
  year = {2024},
  doi = {10.1145/3620665.3640400}
}