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P2 METAL: Caching Multi-level Indexes in Domain-Specific Architectures

METAL:在领域特定架构中缓存多级索引
ASPLOS Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 22024匹配度 1/10 · 论文研究领域特定架构中的多级索引缓存硬件机制,属于计算机体系结构方向,与用户关注的静态分析、Agentic 程序、浮点/贝叶斯程序分析及 LLM 交叉均无直接关联。引用 3 inbox
Anagha Molakalmur Anil Kumar, Aditya Prasanna, Jonathan Balkind, Arrvindh Shriraman
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:提出可移植缓存机制 METAL,解耦索引元数据与数据复用,通过 IX-Cache 和复用模式加速领域特定架构的稀疏索引访问。

领域特定架构(DSA)处理稀疏数据时需要索引数据结构的硬件支持。索引虽能节省空间并降低 DRAM 带宽,但其动态访问、指针追踪和遍历查找会膨胀工作集并造成缓存抖动,论文指出缓存组织本身是根因。METAL 是一种可移植缓存惯用法,使 DSA 能采用索引数据结构;它将索引元数据复用与数据复用解耦并独立优化。其两个核心思想是:IX-Cache 利用范围标签缩短索引遍历并减小工作集,从而权衡更宽索引节点与更靠近叶节点之间的取舍;复用模式提供显式缓存管理接口,在动态遍历不同索引区域时编排缓存插入与旁路。评估显示,METAL 相较流式 DSA 提升 7.8×、地址缓存提升 4.1×、先进 DSA 缓存提升 2.4×,并将 DRAM 能耗较先前最优降低 1.6×。

问题
领域特定架构处理稀疏数据时缺乏对索引数据结构的硬件支持;索引的动态访问、指针追踪与查找遍历会膨胀工作集并造成缓存抖动。
方法
提出可移植缓存惯用法 METAL,将索引元数据复用与数据复用解耦并独立优化:IX-Cache 用范围标签缩短索引遍历、降低工作集,复用模式提供显式缓存管理接口,在遍历不同索引区域时编排插入与旁路。
评估
在性能上相较流式 DSA 提升 7.8×、地址缓存提升 4.1×、先进 DSA 缓存提升 2.4×,并将 DRAM 能耗较先前最优降低 1.6×。
原文摘要(Abstract)

State-of-the-art domain specific architectures (DSAs) work with sparse data, and need hardware support for index data-structures [31, 43, 57, 61]. Indexes are more space-efficient for sparse-data, and reduce DRAM bandwidth, if data reuse can be managed. However, indexes exhibit dynamic accesses, chase pointers, and need to walk-and-search. This inflates the working set and thrashes the cache. We observe that the cache organization itself is responsible for this behavior. We develop METAL, a portable caching idiom that enables DSAs to employ index data-structures. METAL decouples reuse of the index metadata from data reuse, and optimizes it independently. We propose two ideas: i) IX-Cache: A cache that leverages range tags to short-circuits index walks, and reduces the working set. IX-cache helps capture the trade-off between wider index nodes that maximize reach vs those that are closer to leaf and minimize walk latency. ii) Reuse Patterns: An interface to explicitly manage the cache. Patterns orchestrate cache insertions and bypass as we dynamically traverse different index regions. METAL improves performance vs. streaming DSAs by 7.8×, address-caches by 4.1×, and state-of-the-art DSA-cache [50] by 2.4×. We reduce DRAM energy by 1.6× vs. prior state-of-the-art.

链接与引用

DOI 原文 · DBLP

BibTeX
@inproceedings{KumarPBS24,
  title = {METAL: Caching Multi-level Indexes in Domain-Specific Architectures},
  author = {Anagha Molakalmur Anil Kumar and Aditya Prasanna and Jonathan Balkind and Arrvindh Shriraman},
  booktitle = {ASPLOS},
  year = {2024},
  doi = {10.1145/3620665.3640402}
}