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P2 RANGE-BLOCKS: A Synchronization Facility for Domain-Specific Architectures

RANGE-BLOCKS:面向领域特定架构的同步设施
ASPLOS Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 12025匹配度 1/10 · 该论文研究面向领域特定架构的硬件同步设施与键范围锁,核心属于计算机体系结构与并发/内存模型,与用户关注的静态分析、LLM/Agent、浮点程序分析和贝叶斯程序分析均无直接交集。引用 0 inbox
Anagha Molakalmur Anil Kumar, Aditya Prasanna, Arrvindh Shriraman
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:提出 RBlox 硬件同步设施,用键范围锁为领域特定架构支持动态数据结构,显著提升性能并降低带宽与能耗。

当前领域特定架构(DSA)主要面向静态数据结构,仅支持原地更新,难以插入或删除数据;要支持可变、可动态伸缩的数据结构,又缺乏同步设施,只能依赖地址原子操作或主机批量更新,性能代价高且锁需大缓存。RBlox 提出面向 DSA 的硬件同步设施,以键范围刻画同步边界,利用符号化范围锁紧凑表示多个嵌套对象上的互斥,小型片上表(2KB)即可替代地址锁的大缓存(256KB),并通过范围显式表示感兴趣区域实现即时互斥。在 128-tile 数据流 DSA 上,性能提升 15 倍,DRAM 带宽降低 4 倍,片上流量节省 70%,片上能耗仅需 6.6%。

问题
DSA 以静态数据结构为主,缺乏同步设施以支持可变且可动态伸缩的数据结构;现有地址原子操作或主机批量更新会带来高昂性能开销和较大锁缓存需求。
方法
提出 RBlox,用键范围表示同步边界和符号化范围锁,紧凑表示嵌套对象上的互斥,仅需 2KB 片上表,并利用范围显式表示关注区域来即时实现互斥。
评估
在 128-tile 数据流 DSA 上评估,性能提升 15 倍,DRAM 带宽降低 4 倍,片上流量节省 70%,片上能耗降至 6.6%。
原文摘要(Abstract)

Current domain-specific architectures (DSAs) work predominantly with static data structures and find it challenging to insert or remove data (they only support in-place updates). However, as DSAs target real-world applications, it is neces- sary to support mutable and dynamically resizable data structures. DSAs cannot support dynamic data structures since they lack a synchronization facility. DSAs are forced to either use address-based atomics or batch updates on the host. Unfortunately, both approaches introduce prohibitive performance penalties and require large caches for the locks. Range-blocks (RBlox) develops a hardware synchronization facility for DSAs to support dynamic data structures. Our idea is to use key ranges to capture synchronization boundaries and tap into the inherent parallelism of the data-structure layout. We make two novel observations that enable a practical hardware implementation: i) Range locks are symbolic and can compactly represent mutexes on multiple nested objects. Thus, any operation requires fewer range locks, and a small on-chip table suffices (2kb) compared to large caches (256kb) for address-based locks [79, 81]. ii) Ranges also explicitly represent the region of interest, and we can instantly achieve mutual exclusion (instead of relying on ordering). On a 128-tile dataflow DSA, we improve performance by 15×, reduce DRAM bandwidth by 4×, save 70% of on-chip traffic, and require 6.6% of on-chip energy.

链接与引用

DOI 原文 · DBLP

BibTeX
@inproceedings{KumarPS25,
  title = {RANGE-BLOCKS: A Synchronization Facility for Domain-Specific Architectures},
  author = {Anagha Molakalmur Anil Kumar and Aditya Prasanna and Arrvindh Shriraman},
  booktitle = {ASPLOS},
  year = {2025},
  doi = {10.1145/3669940.3707225}
}