一句话：提出 Skia，通过解码 FDIP 已取指缓存行中未解码的“影子分支”并存入影子分支缓冲，在 BTB 缺失时辅助预取，提升前端性能。
现代处理器用 FDIP 避免前端停顿，但其依赖 BPU/BTB 跟踪。数据中心应用代码足迹增大导致 BTB 缺失；这些分支常曾被解码却被逐出，BPU 无法识别，FDIP 因此不预取或走错路径并污染 L1-I。作者发现 75% 的 BTB 缺失未识别分支实际位于 FDIP 已取过的缓存行中，只因缓存行仅从入口解码到出口而成为未解码的“影子分支”。Skia 解码这些被忽略字节并存入 Shadow Branch Buffer，与 BTB 并行访问，使 BTB 缺失时仍可推测。仅 12.25KB 状态，在 16 个前端受限应用上相对 8K-entry BTB（78KB）取得约 5.7% 几何平均加速，相对给 BTB 增加同等状态约 2% 加速；各尺寸直到饱和前均因 SBB 分支差异获得增益。
Modern processors implement a decoupled front-end, often using a form of Fetch Directed Instruction Prefetching (FDIP), to avoid front-end stalls. FDIP is driven by the Branch Prediction Unit (BPU), relying on the BPU's accuracy and branch target tracking structures to speculatively fetch instructions into the Instruction Cache (L1-I cache). As contemporary data center applications become more complex, their code footprints also grow, resulting in a high number of Branch Target Buffer (BTB) misses. These BTB missing branches typically have previously been decoded and placed in the BTB, but have since been evicted, leading to BTB misses now. FDIP can alleviate L1-I cache misses, but its reliance on the BPU's tracking structures means that when it encounters a BTB miss, the BPU may not identify the current instruction as a branch to FDIP. This can prevent FDIP from prefetching or cause it to speculate down the wrong path, further polluting the L1-I cache. We observe that the vast majority, 75%, of BTB-missing, unidentified branches are actually present in instruction cache lines that FDIP has previously fetched. Nevertheless, these missing branches have not yet been decoded and inserted into the BTB. This is because the instruction line is decoded from an entry point (which is the target of the previous taken branch) till an exit point (taken branch). We call branch instructions present in the ignored portion of the cache line ''Shadow Branches.'' Here we present Skia, a novel shadow branch decoding technique that identifies and decodes unused bytes in cache lines fetched by FDIP, inserting them into a Shadow Branch Buffer (SBB). The SBB is accessed in parallel with the BTB, allowing FDIP to speculate despite a BTB miss. With a minimal storage state of 12.25KB, Skia delivers a geomean speedup of ~5.7% over an 8K-entry BTB (78KB) and ~2% versus adding an equal amount of state to the BTB, across 16 front-end bound applications. Since many branches stored in the SBB are distinct compared to those in a similarly sized BTB, we consistently observe greater performance gains with Skia across all examined sizes until saturation.
@inproceedings{PepiGTCGJPA25,
title = {Skia: Exposing Shadow Branches},
author = {Chrysanthos Pepi and Bhargav Reddy Godala and Krishnam Tibrewala and Gino A. Chacon and Paul V. Gratz and Daniel A. Jiménez and Gilles A. Pokam and David I. August},
booktitle = {ASPLOS},
year = {2025},
doi = {10.1145/3676641.3716273}
}