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P2 Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM Accelerators

成为 CIM 还是成为内存:面向 CIM 加速器的双模式感知 DNN 编译器
ASPLOS Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 22025匹配度 2/10 · 该论文属于面向CIM加速器的DNN编译器与体系结构优化,核心是模式切换、资源分配和编译优化,与用户关注的静态分析、Agentic程序、浮点程序分析、贝叶斯程序分析及LLM交叉方向没有直接关联。仅“编译与代码生成”标签与PL有边缘联系,但不涉及用户正在追的核心问题。引用 2 inbox
Shixin Zhao, Yuming Li, Bing Li, Yintao He, Mengdi Wang, Yinhe Han, Ying Wang
crossref: 2026-09-12dblp: 2026-09-12arxiv: 2026-09-12

AI 速览

一句话:提出 CMSwitch 编译器,将 CIM 的计算/内存模式切换纳入编译优化空间,自动完成网络分段与资源分配。

计算存内(CIM)架构在性能上优于传统架构,但现有 CIM 编译方法大多只针对特定 CIM 做调度优化,忽略了 CIM 可在计算模式与内存模式之间动态切换这一关键能力,因而难以适应真实深度神经网络(尤其是新兴大语言模型)多样化的计算与内存需求。为此,本文提出 CMSwitch:通过引入新的硬件抽象属性,把计算-内存模式切换纳入 CIM 编译优化空间;并提出新的编译优化 pass,利用动态规划与混合整数规划识别最优网络分段及其对应的模式资源分配,同时用定制元算子以通用方式表达编译结果。评估显示,CMSwitch 相比现有最先进的 CIM 编译工作平均取得 1.31 倍加速,表明其能充分挖掘 CIM 处理器在各类真实 DNN 应用中的潜力。

问题
现有 CIM 编译方法忽视了 CIM 在计算模式与内存模式间动态切换的能力,无法满足真实 DNN(尤其是大语言模型)多样化的计算与内存需求。
方法
引入能够表达计算-内存模式切换的新硬件抽象属性,将模式切换纳入编译优化空间,并设计基于动态规划与混合整数规划的编译优化 pass 来确定最优网络分段与模式资源分配,最后用定制元算子表达编译结果。
评估
在真实 DNN 应用上与现有 SOTA CIM 编译工作进行对比,平均获得 1.31 倍加速。
原文摘要(Abstract)

Computing-in-memory (CIM) architectures demonstrate superior performance over traditional architectures. To unleash the potential of CIM accelerators, many compilation methods have been proposed, focusing on application scheduling optimization specific to CIM. However, existing compilation methods often overlook CIM's capability to switch dynamically between compute and memory modes, which is crucial for accommodating the diverse memory and computational needs of real-world deep neural network architectures, especially the emerging large language models. To fill this gap, we introduce CMSwitch, a novel compiler to optimize resource allocation for CIM accelerators with adaptive mode-switching capabilities, thereby enhancing the performance of DNN applications. Specifically, our approach integrates the compute-memory mode switch into the CIM compilation optimization space by introducing a new hardware abstraction attribute. Then, we propose a novel compilation optimization pass that identifies the optimal network segment and the corresponding mode resource allocations using dynamic programming and mixed-integer programming. CMSwitch uses the tailored meta-operator to express the compilation result in a generalized manner. Evaluation results demonstrate that CMSwitch achieves an average speedup of 1.31x compared to existing SOTA CIM compilation works, highlighting CMSwitch's effectiveness in fully exploiting the potential of CIM processors for a wide range of real-world DNN applications.

链接与引用

DOI 原文 · arXiv · PDF(开放获取) · DBLP

BibTeX
@inproceedings{abs-2502-17006,
  title = {Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM Accelerators},
  author = {Shixin Zhao and Yuming Li and Bing Li and Yintao He and Mengdi Wang and Yinhe Han and Ying Wang},
  booktitle = {ASPLOS},
  year = {2025},
  doi = {10.1145/3676641.3716248}
}