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P2 Data Cache for Intermittent Computing Systems with Non-Volatile Main Memory

面向非易失性主存间歇计算系统的数据缓存
ASPLOS Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 22025匹配度 0/10 · 该论文研究的是能量采集型间歇计算系统的数据缓存与检查点(WAR 依赖检测、非易失内存写入优化),属于嵌入式体系结构与运行时/内存管理方向,与用户关注的静态分析、LLM/Agent 交叉、浮点程序分析、贝叶斯程序分析均无交集。引用 1 inbox
Sourav Mohapatra, Vito Kortbeek, Marco Antonio van Eerden, Jochem Broekhoff, Saad Ahmed, Przemysław Pawełczak
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:提出 NACHO 数据缓存,将写后读(WAR)检测与缓存集成,降低间歇计算开销与非易失内存写入。

能量采集驱动的间歇计算平台需频繁检查点。非易失性主存(NVM)可省去易失内存检查点而缩小检查点,但因需覆盖写后读(WAR)依赖而提高检查点频率;且 NVM 访问更慢、能耗更高,促使引入数据缓存。但现有缓存方案不适配间歇计算,且多需额外软硬件检测 WAR。本文提出 NACHO,将 WAR 检测直接集成到数据缓存中,省去额外内存跟踪器。评估显示,相比基于缓存的最先进系统,NACHO 平均减少 54% 运行时开销;相比无缓存系统减少 82% 的 NVM 写入,相比多个先进缓存系统平均减少 18% 写入。

问题
间歇计算平台受能量限制,需频繁保存状态;NVM 虽缩小检查点却因 WAR 依赖增加检查点频率,且访问慢、能耗高。现有数据缓存方案不适用于间歇计算,并常需额外硬件/软件检测 WAR。
方法
将写后读(WAR)检测与数据缓存集成,设计 NACHO 数据缓存,消除额外内存跟踪器。
评估
与最先进的基于缓存的间歇计算系统对比,测量运行时开销与 NVM 写次数。NACHO 平均减少 54% 运行时开销,减少 82%(对比无缓存)和 18%(对比多个先进缓存系统)的 NVM 写。
原文摘要(Abstract)

Intermittently-operating embedded computing platforms powered by energy harvesting must frequently checkpoint their computation state. Using non-volatile memory reduces checkpoint size by eliminating the need to checkpoint volatile memory but increases checkpoint frequency to cover Write After Read (WAR) dependencies. Additionally, non-volatile memory is significantly slower to access - while consuming more energy than its volatile counterpart - suggesting the use of a data cache. Unfortunately, existing data cache solutions do not fit the challenges of intermittent computing and often require additional hardware or software to detect WARs. In this paper, we extend the data cache by integrating it with WAR detection - dropping the need for an additional memory tracker. This idea forms the basis of NACHO: a data cache tailored to intermittent computing. NACHO, on average, reduces intermittent computing runtime overhead by 54% compared to state of the art cache-based systems. It also reduces the number of non-volatile memory writes by 82% compared to a data cache-less system, and 18% on average compared to multiple state of the art cache-based systems.

链接与引用

DOI 原文 · PDF(开放获取) · DBLP

BibTeX
@inproceedings{MohapatraKEBAP25,
  title = {Data Cache for Intermittent Computing Systems with Non-Volatile Main Memory},
  author = {Sourav Mohapatra and Vito Kortbeek and Marco Antonio van Eerden and Jochem Broekhoff and Saad Ahmed and Przemysław Pawełczak},
  booktitle = {ASPLOS},
  year = {2025},
  doi = {10.1145/3676641.3715989}
}