一句话：提出目的地内存排序模型与 PCIe/ISA 扩展，消除远程非一致互连的源端串行化，显著提升网卡与 RDMA 性能。
使用 PCIe 等非一致互连的软件需要细粒度内存排序，但现有硬件要求昂贵的源端串行化，导致两类关键应用受限：CPU 向 NIC 发送网络包需要写-写排序，支持 RDMA 的 NIC 进行键值存储查找需要读-读排序。本文提出一种基于目的地的排序模型，并进行软硬件协同设计：通过 PCIe 扩展和 ISA 扩展让软件高效表达排序意图，同时在 Root Complex 引入新微架构来执行这些语义，从而消除源端停顿。评估表明，该方法显著提升两类应用内核的吞吐量，并支持更简单的新协议，其性能超过现有最优方案。
Software using non-coherent interconnects like PCI Express requires fine-grained memory ordering, but current hardware mandates the use of costly source-side serialization. We show that this architectural mismatch severely limits the performance of two critical applications: (1) the transmission of network packets from a CPU to a NIC (requiring write-to-write ordering) and (2) key-value store lookups by an RDMA-enabled NIC (requiring read-to-read ordering). We address this by proposing a new destination-based ordering model and the hardware-software co-design comprising PCIe extensions and ISA extensions that allow software to express ordering intent efficiently. Novel microarchitecture at the Root Complex enforces these expressed semantics, eliminating source-side stalls. Our approach significantly improves the throughput of these application kernels and enables new, simpler protocols that outperform the state-of-the-art.
@inproceedings{LiewR0SN26,
title = {Efficient Remote Memory Ordering for Non-Coherent Systems},
author = {Wei Siew Liew and Md Ashfaqur Rahaman and Adarsh Patil and Ryan Stutsman and Vijay Nagarajan},
booktitle = {ASPLOS},
year = {2026},
doi = {10.1145/3779212.3790156}
}