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P2 Finding Reusable Instructions via E-Graph Anti-Unification

通过 E-Graph 反合一发现可复用自定义指令
ASPLOS Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 22026匹配度 2/10 · 论文聚焦 RISC-V 自定义指令发现与 e-graph 反合一,属于编译/体系结构中的程序分析技术,但与用户核心关注的 LLM/Agentic 程序静态分析、LLM 辅助静态分析/形式化验证、浮点程序分析及贝叶斯程序分析均无直接交集。引用 1 inbox
Youwei Xiao, Chenyun Yin, Yitian Sun, Yuyang Zou, Yun Liang
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:提出 ISAMORE 框架,利用 e-graph 反合一从领域应用中挖掘语义等价的可复用自定义指令,性能提升 1.12–2.69 倍。

领域专用加速器依赖自定义指令触发专用硬件,但现有自动探索方法可复用性差、性能受限,只能识别语法相似的标量指令序列,遗漏语义等价模式。本文提出端到端框架 ISAMORE:先用结构化 DSL 将应用编码进 e-graph,再由核心方法 RII 通过 e-graph 反合一发现跨应用的语义等价公共模式;RII 用分阶段迭代与启发式提升可扩展性,引入模式向量化把标量公共操作打包为向量指令 lane,并基于 profiling 的硬件感知代价模型做 Pareto 最优选择以权衡性能与面积。评估显示其较基线提升 1.12x–2.69x,并在库分析、量化 LLM 推理与后量子密码等案例中验证了实用价值。

问题
现有自动化方法可复用性差、性能有限,只能识别或合并语法相似的标量指令序列,无法发现语义等价模式,导致领域自定义指令探索困难。
方法
ISAMORE 用结构化 DSL 将应用编码进 e-graph,核心的 RII 以 e-graph 反合一识别跨应用的语义等价公共模式,并结合分阶段迭代启发式、模式向量化与基于 profiling 的硬件感知 Pareto 最优选择。
评估
与基线方法相比取得 1.12x–2.69x 性能提升;通过三个应用领域的库分析以及量化 LLM 推理、后量子密码的硬件特化案例研究验证实用性。
原文摘要(Abstract)

Domain-specific accelerators provide an increasingly valuable source of performance for diverse applications. Custom instructions that trigger the execution of dedicated hardware units or accelerators for common application functions become key building blocks in modern computing systems, balancing performance and cost effectiveness. RISC-V, the open and extensible instruction set architecture, is increasingly popularizing this trend. However, exploring custom instructions for an application domain remains challenging. Existing automated approaches suffer from poor reusability and limited performance. They can only identify or merge syntactically similar, scalar instruction sequences while missing semantically equivalent patterns. We present ISAMORE, an end-to-end framework for discovering reusable custom instructions from domain applications. ISAMORE encodes general applications in an e-graph by constructing a structured domain-specific language. Its core methodology, reusable instruction identification (RII), leverages e-graph anti-unification (AU) to identify semantically equivalent common patterns across diverse applications, fully unleashing the potential of custom instructions. RII employs a phase-oriented iterative process with smart heuristics to enhance the scalability when dealing with real-world codebases. Besides, RII introduces the novel pattern vectorization technique, packing common operations from scalar programs into lanes of vectorized custom instructions to exploit data-level parallelism. Moreover, RII's Pareto-optimal pattern selection balances performance gains with area overheads, guided by a profiling-based hardware-aware cost model. Evaluation demonstrates ISAMORE 's substantial performance gains, 1.12x-2.69x, over baseline approaches. We also demonstrate ISAMORE's practical potentials using various case studies, including library analysis for three application domains and hardware specialization for quantized LLM inference and post-quantum cryptography.

链接与引用

DOI 原文 · PDF(开放获取) · DBLP

BibTeX
@inproceedings{XiaoYSZ026,
  title = {Finding Reusable Instructions via E-Graph Anti-Unification},
  author = {Youwei Xiao and Chenyun Yin and Yitian Sun and Yuyang Zou and Yun Liang},
  booktitle = {ASPLOS},
  year = {2026},
  doi = {10.1145/3779212.3790162}
}