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P2 Synthesizing Hardware-Specific Instructions for Efficient Code Generation of Simulink

面向 Simulink 高效代码生成的硬件特定指令合成
ICSE Proceedings of the 2026 IEEE/ACM 48th International Conference on Software Engineering2026匹配度 1/10 · 该论文研究 Simulink 模型到嵌入式代码生成中的硬件特定指令合成,属于编译与代码生成方向,与用户关注的 PL 与 AI/Agent、静态分析、浮点程序分析或贝叶斯程序分析均无直接关联。引用 0 inbox
Zehong Yu, Zhuo Su, Rui Wang, Yu Jiang
crossref: 2026-09-12

AI 速览

一句话:提出 Amica,利用 Simulink 模型语义合成硬件特定指令,显著提升生成代码性能并减小汇编体积。

Simulink 在嵌入式开发中广泛使用,但其生成代码需满足严格的性能与资源约束。现有代码生成器忽略了现代处理器中的硬件特定指令,如饱和类指令,而依赖通用编译器也难以有效利用这些复杂语义指令。本文提出 Amica,一种面向 Simulink 模型的高效代码生成器。其核心思想是利用模型语义来合成合适指令:先将模型转换为数据流图,并构造带有块参数、数据类型等约束的优化规则子图;再迭代匹配这些规则以寻找可优化候选,选择延迟降低最大的候选更新数据流图;最后按指令语法和块属性为可优化块合成硬件特定指令。作者在基准 Simulink 模型上实现并评估 Amica。与 Simulink Embedded Coder、Mercury 和 Frodo 相比,Amica 生成代码在不同平台上执行时间快 1.29–8.36 倍,汇编代码尺寸减少 6%–53%,数据段和 BSS 段大小相近。

问题
Simulink 生成嵌入式代码时面临严格性能与资源约束,现有代码生成器未利用现代处理器的硬件特定指令,而通用编译器又难以有效使用这些复杂语义指令。
方法
Amica 将 Simulink 模型转为数据流图,用带块参数、数据类型等约束的优化规则子图迭代匹配,选择延迟降低最大的候选更新图,并按指令语法合成硬件特定指令。
评估
在基准 Simulink 模型上实现并评估;与 Simulink Embedded Coder、Mercury、Frodo 对比,生成代码执行时间快 1.29–8.36 倍,汇编代码尺寸降低 6%–53%,数据段与 BSS 段大小相近。
原文摘要(Abstract)

Simulink has become a pivotal tool in embedded scenarios, offering a model-driven approach for embedded software development. Given the tight performance and resource constraints in embedded applications, it is crucial to ensure the efficiency of the code generated from Simulink models. Code generators implement various optimizations to enhance performance. However, they neglect the potential of hardware-specific instructions available in modern processors, such as saturation-type instructions, which accomplish complex operations in fewer cycles. Moreover, relying on state-of-the-art compilers to use these instructions is also not as effective as expectation, due to their complex semantics. This paper proposes Amica, an efficient code generator for Simulink models with hardware-specific instruction synthesis. The key insight of Amica is to leverage model semantics to effectively synthesize the appropriate instructions. Amica first converts the model into the dataflow graph and crafts a series of optimization rules represented as dataflow subgraph with constraints related to block parameters, data types, and other critical properties. Then, Amica iteratively matches these rules with dataflow graph to obtain the optimizable candidates. The candidate that maximizes latency reduction is chosen to update the dataflow graph. Finally, Amica synthesizes the appropriate instructions for optimizable blocks in accordance with instruction syntax and block properties. We implemented and evaluated Amica on benchmark Simulink models. Compared with the state-of-the-art code generators Simulink Embedded Coder, Mercury, and Frodo, the code generated by Amica is 1.29 × - 8.36 × faster in terms of execution time across different platforms. Besides, Amica reduces 6% - 53% assembly code size of the compiled programs, while performing similarly in terms of data segment size and BSS segment size.

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BibTeX
@inproceedings{paperbot11707,
  title = {Synthesizing Hardware-Specific Instructions for Efficient Code Generation of Simulink},
  author = {Zehong Yu and Zhuo Su and Rui Wang and Yu Jiang},
  booktitle = {ICSE},
  year = {2026},
  doi = {10.1145/3744916.3764536}
}