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P2 Taming x86-TSO persistency

驯服 x86-TSO 持久性
POPL 5(POPL)2021匹配度 2/10 · 论文属于并发内存模型与非易失内存的形式语义研究,与用户关注的核心方向(LLM/Agent 与静态分析、形式化验证的交叉,浮点程序分析,贝叶斯程序分析)没有直接关联;仅在形式化验证/程序验证方法层面存在很弱的间接联系。引用 26 inbox
Artem Khyzha, Ori Lahav
crossref: 2026-09-10

AI 速览

一句话:为 x86-TSO 非易失内存建立等价持久性模型,并给出到 x86 的健全映射与数据竞争自由保证。

论文研究 x86-TSO 体系结构下非易失内存的形式语义。作者证明 Raad 等人 POPL'20 模型中显式 persist 操作虽只强制非易失内存写之间的顺序,但从可达状态看等价于要求此前写真正落入非易失内存的模型,从而给出更贴近开发者直觉的新模型。进一步提出更简单更强的顺序一致持久性模型,构造到 x86 的健全映射,并建立数据竞争自由保证,为程序员提供安全编程规范。操作模型配有等价声明式表述,便于形式论证,也可用于 x86 持久性下的程序验证。

问题
x86-TSO 非易失内存的持久性语义不直观,显式 persist 操作与开发者理解之间存在差距,且缺乏便于推理和验证的形式模型。
方法
比较并等价转换现有操作语义,提出新的持久性模型及顺序一致持久性模型,给出到 x86 的健全映射,并配有声明式表述和形式化证明。
评估
通过可达状态等价性证明、到 x86 映射的健全性论证以及数据竞争自由保证来评估模型;声明式形式可用于程序验证。
原文摘要(Abstract)

We study the formal semantics of non-volatile memory in the x86-TSO architecture. We show that while the explicit persist operations in the recent model of Raad et al. from POPL'20 only enforce order between writes to the non-volatile memory, it is equivalent, in terms of reachable states, to a model whose explicit persist operations mandate that prior writes are actually written to the non-volatile memory. The latter provides a novel model that is much closer to common developers' understanding of persistency semantics. We further introduce a simpler and stronger sequentially consistent persistency model, develop a sound mapping from this model to x86, and establish a data-race-freedom guarantee providing programmers with a safe programming discipline. Our operational models are accompanied with equivalent declarative formulations, which facilitate our formal arguments, and may prove useful for program verification under x86 persistency.

链接与引用

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BibTeX
@article{paperbot1184,
  title = {Taming x86-TSO persistency},
  author = {Artem Khyzha and Ori Lahav},
  journal = {Proceedings of the ACM on Programming Languages},
  volume = {5},
  number = {POPL},
  year = {2021},
  doi = {10.1145/3434328}
}