一句话：提出硬件设计语言 Kanagawa，用 Wavefront Threading 执行模型融合 HLS 生产力与 RTL 硬件效率。
数字系统日益重要且计算硬件趋于异构，但 VHDL/Verilog 等传统 HDL 使硬件设计仍费力昂贵。长期目标是用高层语言像软件一样编程硬件，并生成高效设计。本文提出 Kanagawa：它试图融合传统高层综合（HLS）带来的程序员生产力优势与寄存器传输级（RTL）设计的表达力和硬件效率。该语言采用简洁语法和面向硬件设计的 Wavefront Threading 执行模型，使相对简单的工具链即可把高层代码映射为高效硬件实现。摘要未给出具体基准或量化评估，核心贡献在于语言与执行模型层面的新方案。
Digital systems are growing in importance and computing hardware is growing more heterogeneous. Hardware design, however, remains laborious and expensive, in part due to the limitations of conventional hardware description languages (HDLs) like VHDL and Verilog. A longstanding research goal has been programming hardware like software, with high-level languages that can generate efficient hardware designs. This paper describes Kanagawa, a language that takes a new approach to combine the programmer productivity benefits of traditional High-Level Synthesis (HLS) approaches with the expressibility and hardware efficiency of Register-Transfer Level (RTL) design. The language’s concise syntax, matched with a hardware design-friendly execution model, permits a relatively simple toolchain to map high-level code into efficient hardware implementations.
DOI 原文 · arXiv · PDF（开放获取） · DBLP
@article{abs-2405-19514,
title = {Wavefront Threading Enables Effective High-Level Synthesis},
author = {Blake Pelton and Adam Sapek and Ken Eguro and Daniel Lo and Alessandro Forin and Matt Humphrey and Jinwen Xi and David Cox and Rajas Karandikar and Johannes de Fine Licht and Evgeny Babin and Adrian Caulfield and Doug Burger},
journal = {Proceedings of the ACM on Programming Languages},
volume = {8},
number = {PLDI},
year = {2024},
doi = {10.1145/3656420}
}