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P2 Fungible Memories for Automated Technology Mapping and Retargeting

可互换存储器:面向自动化技术映射与重定向
PLDI 10(PLDI)2026匹配度 2/10 · 论文聚焦 HDL 存储器抽象、技术映射与重定向,核心是 EDA/硬件编译与结构感知等价饱和;与用户的 ML/Agentic 程序静态分析、LLM 用于静态分析/形式化验证、浮点程序分析等方向没有直接交叉。引用 0 inbox
Zachary D. Sisco, Sijie Kong, Daniel Ruelas-Petrisko, Jingtao Xia, Julian Springer, Varun Rao, Spencer Wang, Gus Henry Smith, Ben Hardekopf, Jonathan Balkind
crossref: 2026-09-10

AI 速览

一句话:提出 HDL 级可互换存储器抽象与 Memo 编译器,实现存储器一次编写、自动映射到仿真/ASIC/FPGA 并支持重定向。

芯片开发需面向仿真、ASIC 和 FPGA 等多种技术。传统方法将存储器等代码拆成多个技术专用块来实现相同高层行为,导致代码脆弱、语义重复且细微不一致,损害验证、敏捷性与可扩展性。论文提出可互换存储器(fungible memories):一种 HDL 级“一次编写、随处映射”的存储器抽象,语义足够丰富,可通过单一通用接口自动面向所有相关技术。作者将其集成到 Memo 编译器,并提出存储器反编译器,能从已有门级设计提升存储器到 Memo,实现自动化技术重定向。为处理大规模网表,还提出结构感知等式饱和技术,可扩展到数百万单元网表并识别出现有技术无法发现的内存。评估在包括 RISC-V 多核 SoC 的代表性设计上表明,Memo 可有效生成仿真、ASIC 与 FPGA 后端。

问题
芯片开发中,存储器等代码常被拆成多个技术专用块来实现相同高层行为,造成代码脆弱、语义重复且难以验证、扩展和快速适配不同技术。
方法
提出 HDL 级可互换存储器抽象与 Memo 编译器,以单一通用接口自动映射到多种技术;同时提出存储器反编译器,可从门级设计提升存储器到 Memo,并用结构感知等式饱和处理大规模网表。
评估
在多种代表性设计上评估 Memo 对仿真、ASIC 和 FPGA 后端的映射能力,包括 RISC-V 多核 SoC,并展示其结构感知等式饱和可扩展到数百万单元网表。
原文摘要(Abstract)

During chip development, engineers must target different technologies, such as simulation and various ASIC and FPGA technologies. Conventionally, they split parts of the code (e.g., memories) into separate technology-specialized blocks implementing the same high-level behavior. This leads to brittle code, with multiple but subtly different blocks describing the same semantic behavior, harming verification, agility, and extensibility. We propose fungible memories, an HDL-level "write once, map anywhere" memory abstraction with rich enough semantics to automatically target all relevant technologies using a single generic interface. We incorporate fungible memories into a compiler called Memo. For designs without a specific technology mapping, we also present a memory decompiler which lifts memories from an existing gate-level design to Memo, enabling automated technology re-targeting, which is a holy grail for digital designers. We present a structure-aware equality saturation technique which scales to netlists with millions of cells and identifies memories that the state of the art cannot. We demonstrate that Memo effectively targets backends across different technology platforms (simulation, ASIC, and FPGA) over a suite of representative designs, including a RISC-V multicore SoC.

链接与引用

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BibTeX
@article{SiscoKRXSRWSHB26,
  title = {Fungible Memories for Automated Technology Mapping and Retargeting},
  author = {Zachary D. Sisco and Sijie Kong and Daniel Ruelas-Petrisko and Jingtao Xia and Julian Springer and Varun Rao and Spencer Wang and Gus Henry Smith and Ben Hardekopf and Jonathan Balkind},
  journal = {Proceedings of the ACM on Programming Languages},
  volume = {10},
  number = {PLDI},
  year = {2026},
  doi = {10.1145/3808294}
}