一句话：提出统一可重定向的CGRA编译框架NEURA，用谓词类型系统纯数据流IR解决控制流与数据流不匹配。
粗粒度可重构架构（CGRA）兼具专用加速器的性能能效与软件可编程性，但内核中的循环、分支等控制流与并行、数据驱动的CGRA结构根本冲突，已有方案在效率或跨执行模型通用性上受限。NEURA是一个统一且可重定向的编译框架，其核心是建立在谓词类型系统上的纯数据流中间表示：将控制上下文作为谓词嵌入每条数据，使控制成为数据的固有属性，从而把复杂控制流系统性地扁平化为统一数据流图。该表示与硬件解耦，可适配不同执行模型与微架构的CGRA。评估显示，面向高性能时空CGRA时，NEURA在内核基准上获得2.20倍加速，真实应用几何平均最高2.71倍加速；重定向到仅空间CGRA时也与SOTA低功耗方案有竞争力。框架已开源。
Coarse-Grained Reconfigurable Architectures (CGRAs) are a promising and versatile accelerator platform, offering a balance between the performance and efficiency of specialized accelerators and software programmability. However, their full potential is severely hindered by control flow in accelerated kernels, as control flow (e.g., loops, branches) is fundamentally incompatible with the parallel, data-driven CGRA fabric. Prior strategies to resolve this mismatch in CGRA kernel acceleration are either inefficient, sacrificing performance for generality, or lack generality due to the difficulty of adapting them across different execution models. Thus, a general and unified solution for efficient CGRA kernel acceleration remains elusive. This paper introduces NEURA, a unified and retargetable compilation framework that systematically resolves the control-dataflow mismatch in CGRAs. NEURA's core innovation is a novel, pure dataflow intermediate representation (IR) built on a predicated type system. In this IR, control contexts are embedded as a predicate within each data, making control an intrinsic property of data. This mechanism enables NEURA to systematically flatten complex control flow into a single unified dataflow graph. This unified representation decouples kernel representation from hardware, empowering NEURA to retarget diverse CGRAs with different execution models and microarchitectural features. When targeted to a high-performance spatio-temporal CGRA, NEURA delivers a 2.20x speedup on kernel benchmarks and up to 2.71x geometric mean speedup on real-world applications over state-of-the-art (SOTA) high-performance baselines. It also provides a competitive solution against the SOTA low-power CGRA when retargeted to a spatial-only CGRA. NEURA is open-source and available at https://github.com/coredac/neura.
@article{paperbot3770,
title = {NEURA: A Unified and Retargetable Compilation Framework for Coarse-Grained Reconfigurable Architectures},
author = {Shangkun Li and Jinming Ge and Diyuan Tao and Zeyu Li and Jiawei Liang and Linfeng Du and Jiang Xu and Wei Zhang and Cheng Tan},
journal = {Proceedings of the ACM on Programming Languages},
volume = {10},
number = {PLDI},
year = {2026},
doi = {10.1145/3808285}
}