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P2 Efficient Address Translation for Architectures with Multiple Page Sizes

面向多页大小架构的高效地址翻译
ASPLOS Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems2017匹配度 1/10 · 论文属于计算机体系结构中的 TLB 与地址翻译优化,关注多页大小下的硬件结构设计;与用户研究画像中的程序语言、静态分析、LLM/Agent 交叉、浮点程序分析、贝叶斯程序分析等方向无直接关系。引用 118 inbox
Guilherme Cox, Abhishek Bhattacharjee
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:提出 MIX TLB:利用超级页分配模式的低能耗组相联结构,同时支持所有页大小,性能提升 10-30%。

处理器与操作系统普遍支持多种内存页大小:超级页可提高 TLB 命中率,小页则提供细粒度内存保护,理想情况下 TLB 应对任意页大小分布都有良好表现。然而,因能效优势而被广泛采用的组相联 TLB 难以同时支持多种页大小,商用系统通常为每种页大小实现独立的组相联 TLB。这导致一个反直觉的后果:当超级页被激进分配时,即使小页表项闲置,TLB 缺失也可能增加,反之亦然。本文提出 MIX TLB,一种节能的组相联结构,通过利用超级页的分配模式在同一结构中并发支持所有页大小。作者在原生 CPU、虚拟化 CPU 与 GPU 上对大内存应用进行评测,性能通常提升 10-30%,且 MIX TLB 设计简单,无需修改操作系统或应用程序。

问题
组相联 TLB 无法同时支持多种页大小,商用系统被迫为每种页大小维护独立 TLB,导致超级页被激进分配时 TLB 缺失反而增加(反之亦然)。
方法
设计 MIX TLB:一种节能的组相联 TLB 结构,利用超级页的分配模式,在单个结构内并发支持所有页大小,且无需操作系统或程序改动。
评估
在原生 CPU、虚拟化 CPU 和 GPU 上对大内存应用进行性能评测,结果显示性能通常提升 10-30%。
原文摘要(Abstract)

Processors and operating systems (OSes) support multiple memory page sizes. Superpages increase Translation Lookaside Buffer (TLB) hits, while small pages provide fine-grained memory protection. Ideally, TLBs should perform well for any distribution of page sizes. In reality, set-associative TLBs -- used frequently for their energy efficiency compared to fully-associative TLBs -- cannot (easily) support multiple page sizes concurrently. Instead, commercial systems typically implement separate set-associative TLBs for different page sizes. This means that when superpages are allocated aggressively, TLB misses may, counter intuitively, increase even if entries for small pages remain unused (and vice-versa). We invent MIX TLBs, energy-frugal set-associative structures that concurrently support all page sizes by exploiting superpage allocation patterns. MIX TLBs boost the performance (often by 10-30%) of big-memory applications on native CPUs, virtualized CPUs, and GPUs. MIX TLBs are simple and require no OS or program changes.

链接与引用

DOI 原文 · DBLP

BibTeX
@inproceedings{CoxB17,
  title = {Efficient Address Translation for Architectures with Multiple Page Sizes},
  author = {Guilherme Cox and Abhishek Bhattacharjee},
  booktitle = {ASPLOS},
  year = {2017},
  doi = {10.1145/3037697.3037704}
}