一句话:提出硬件-软件协同设计以缓解 DRAM 刷新带来的性能开销。
DRAM 单元需周期性刷新以保持数据完整性;容量增大使每次刷新命令要刷新的行数增多,刷新周期时间 tRFC 增加,刷新成为显著性能瓶颈。现代 DRAM 通常在 rank 级刷新,移动 LPDDR 支持按 bank 刷新:rank 级刷新会阻塞同一 rank 内所有 bank 的按需请求,按 bank 刷新则允许其他 bank 继续服务。摘要指出典型保持时间为数毫秒,低于 85°C 时 64ms,高于 85°C 时 32ms。标题表明论文采用硬件-软件协同设计缓解这些刷新开销,但摘要未给出具体方法、实验设置或量化结果。
DRAM cells need periodic refresh to maintain data integrity. With high capacity DRAMs, DRAM refresh poses a significant performance bottleneck as the number of rows to be refreshed (and hence the refresh cycle time, tRFC) with each refresh command increases. Modern day DRAMs perform refresh at a rank-level, while LPDDRs used in mobile environments support refresh at a per-bank level. Rank-level refresh degrades the performance significantly since none of the banks in a rank can serve the on-demand requests. Per-bank refresh alleviates some of the performance bottlenecks as the other banks in a rank are available for on-demand requests. Typical DRAM retention time is in the order several of milliseconds, viz, 64msec for environments operating in temperatures below 85 deg C and 32msec for environments operating above 85 deg C.