一句话：提出基于RRAM的可重构内存导向计算架构L-Si，统一计算与存储并降低重配置开销。
该论文针对FPGA在云工作负载中面临的两大挑战：面向轻量计算与片上数据存储的配置能力有限，以及缺乏隐藏重配置开销的体系结构支持，提出了基于新兴非易失存储技术RRAM的可重构内存导向计算架构L-Si。L-Si采用二维阵列中物理相同但功能可配置的构建块，首次将FPGA的配置能力从计算扩展到计算与数据存储的整个范围，使用户能灵活划分硬件资源。它还提供可扩展的多上下文体系结构支持，以最小化重配置开销并辅助虚拟化，并提供编译器支持以方便OpenCL、TensorFlow、MapReduce等高级语言和框架编程。评估显示，L-Si在搜索密集型基准上相比FPGA基线实现99.6%面积缩减、1.43倍吞吐提升和94.0%功耗降低；在神经网络基准上平均获得52.3倍加速、113.9倍能耗缩减和81%面积缩减，并将上下文切换时间从约100ms降至约10ns。
With the recent trend of promoting Field-Programmable Gate Arrays (FPGAs) to first-class citizens in accelerating compute-intensive applications in networking, cloud services and artificial intelligence, FPGAs face two major challenges in sustaining competitive advantages in performance and energy efficiency for diverse cloud workloads: 1) limited configuration capability for supporting light-weight computations/on-chip data storage to accelerate emerging search-/data-intensive applications. 2) lack of architectural support to hide reconfiguration overhead for assisting virtualization in a cloud computing environment. In this paper, we propose a reconfigurable memory-oriented computing fabric, namely Liquid Silicon-Monona (L-Si), enabled by emerging nonvolatile memory technology i.e. RRAM, to address these two challenges. Specifically, L-Si addresses the first challenge by virtue of a new architecture comprising a 2D array of physically identical but functionally-configurable building blocks. It, for the first time, extends the configuration capabilities of existing FPGAs from computation to the whole spectrum ranging from computation to data storage. It allows users to better customize hardware by flexibly partitioning hardware resources between computation and memory, greatly benefiting emerging search- and data-intensive applications. To address the second challenge, L-Si provides scalable multi-context architectural support to minimize reconfiguration overhead for assisting virtualization. In addition, we provide compiler support to facilitate the programming of applications written in high-level programming languages (e.g. OpenCL) and frameworks (e.g. TensorFlow, MapReduce) while fully exploiting the unique architectural capability of L-Si. Our evaluation results show L-Si achieves 99.6% area reduction, 1.43× throughput improvement and 94.0% power reduction on search-intensive benchmarks, as compared with the FPGA baseline. For neural network benchmarks, on average, L-Si achieves 52.3× speedup, 113.9× energy reduction and 81% area reduction over the FPGA baseline. In addition, the multi-context architecture of L-Si reduces the context switching time to - 10ns, compared with an off-the-shelf FPGA (∼100ms), greatly facilitating virtualization.
DOI 原文 ·
@inproceedings{paperbot4261,
title = {Liquid Silicon-Monona},
author = {Yue Zha and Jing Li},
booktitle = {ASPLOS},
year = {2018},
doi = {10.1145/3173162.3173167}
}