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P2 LTRF

LTRF:延迟容忍寄存器文件
ASPLOS Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems2018匹配度 2/10 · 论文提出GPU寄存器文件架构,利用编译期间隔分析预取寄存器工作集,属于计算机体系结构与编译优化,与用户关注的PL/AI交叉、静态分析在ML/Agentic程序中的应用、浮点/贝叶斯程序分析等方向无直接关联,匹配度低。引用 30 inbox
Mohammad Sadrosadati, Amirhossein Mirhosseini, Seyed Borna Ehsani, Hamid Sarbazi-Azad, Mario Drumond, Babak Falsafi, Rachata Ausavarungnirun, Onur Mutlu
crossref: 2026-09-12

AI 速览

一句话:提出 LTRF GPU 寄存器文件架构,用编译期间隔分析预取寄存器工作集,隐藏高延迟主寄存器文件访问。

GPU 使用大容量寄存器文件以支撑大量活跃线程和快速上下文切换,但其访问延迟长、功耗高、面积大,成为可扩展性瓶颈。现有分层寄存器文件通过在较小寄存器文件缓存中缓存寄存器来降低功耗,却因命中率低而无法降低访问延迟。本文提出延迟容忍寄存器文件(LTRF):利用编译期间隔分析将 GPU 程序执行划分为多个区间,准确估计每个 warp 在区间内的聚合寄存器工作集;LTRF 在每个区间开始时由软件控制将估计的工作集从主寄存器文件预取到寄存器文件缓存,并与其他 warp 的执行重叠预取延迟。实验表明,LTRF 可支持高容量但高延迟的主寄存器文件,采用高密度高延迟存储技术时容量提升 8 倍,GPU 总体性能提升 31%,寄存器文件功耗降低 46%。

问题
GPU 大容量寄存器文件面临访问延迟长、功耗高和面积大的可扩展性瓶颈;现有分层寄存器文件缓存因命中率低而未能降低访问延迟。
方法
利用编译期间隔分析估计每个区间内 warp 的聚合寄存器工作集,并在区间开始时由软件控制将工作集从主寄存器文件预取到寄存器文件缓存,同时与其他 warp 执行重叠预取延迟。
评估
通过实验评估 LTRF 在采用高密度高延迟主寄存器文件存储技术时的效果:容量提升 8 倍,GPU 总体性能提升 31%,寄存器文件功耗降低 46%。
原文摘要(Abstract)

Graphics Processing Units (GPUs) employ large register files to accommodate all active threads and accelerate context switching. Unfortunately, register files are a scalability bottleneck for future GPUs due to long access latency, high power consumption, and large silicon area provisioning. Prior work proposes hierarchical register file, to reduce the register file power consumption by caching registers in a smaller register file cache. Unfortunately, this approach does not improve register access latency due to the low hit rate in the register file cache. In this paper, we propose the Latency-Tolerant Register File (LTRF) architecture to achieve low latency in a two-level hierarchical structure while keeping power consumption low. We observe that compile-time interval analysis enables us to divide GPU program execution into intervals with an accurate estimate of a warp's aggregate register working-set within each interval. The key idea of LTRF is to prefetch the estimated register working-set from the main register file to the register file cache under software control, at the beginning of each interval, and overlap the prefetch latency with the execution of other warps. Our experimental results show that LTRF enables high-capacity yet long-latency main GPU register files, paving the way for various optimizations. As an example optimization, we implement the main register file with emerging high-density high-latency memory technologies, enabling 8X larger capacity and improving overall GPU performance by 31% while reducing register file power consumption by 46%.

链接与引用

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BibTeX
@inproceedings{paperbot4263,
  title = {LTRF},
  author = {Mohammad Sadrosadati and Amirhossein Mirhosseini and Seyed Borna Ehsani and Hamid Sarbazi-Azad and Mario Drumond and Babak Falsafi and Rachata Ausavarungnirun and Onur Mutlu},
  booktitle = {ASPLOS},
  year = {2018},
  doi = {10.1145/3173162.3173211}
}