一句话：提出 Buffets：一种与具体设计无关、可组合的加速器片上存储惯用法，显著提升能效。
加速器在定制片上缓冲上耗费大量面积与设计工作，且现有缓冲方案与特定设计强耦合，难以在其他加速器或领域复用。本文提出 Buffets，一种独立于具体设计、高效且可组合的存储惯用法，其特点包括解耦的填充与访问、细粒度同步、层次化组合以及高效多播。作者用 RTL 实现 Buffets，在 8KB RAM 上仅增加 2% 控制开销。跨多种工作负载的评估表明，相比 DMA 管理的双缓冲 scratchpad 和 cache，Buffets 将能耗延迟积分别改善 1.53 倍和 5.39 倍。
Accelerators spend significant area and effort on custom on-chip buffering. Unfortunately, these solutions are strongly tied to particular designs, hampering re-usability across other accelerators or domains. We present buffets, an efficient and composable storage idiom for the needs of accelerators that is independent of any particular design. Buffets have several distinguishing characteristics, including efficient decoupled fills and accesses with fine-grained synchronization, hierarchical composition, and efficient multi-casting. We implement buffets in RTL and show that they only add 2% control overhead over an 8KB RAM. When compared with DMA-managed double-buffered scratchpads and caches across a range of workloads, buffets improve energy-delay-product by 1.53x and 5.39x, respectively.
@inproceedings{paperbot4878,
title = {Buffets},
author = {Michael Pellauer and Yakun Sophia Shao and Jason Clemons and Neal Crago and Kartik Hegde and Rangharajan Venkatesan and Stephen W. Keckler and Christopher W. Fletcher and Joel Emer},
booktitle = {ASPLOS},
year = {2019},
doi = {10.1145/3297858.3304025}
}