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P2 Optimized Compilation of Aggregated Instructions for Realistic Quantum Computers

面向现实量子计算机的聚合指令优化编译
ASPLOS Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems2019匹配度 1/10 · 该论文研究量子程序的编译优化与控制脉冲生成,属于量子编译/代码生成方向,与用户关注的静态分析、LLM/Agent、浮点程序分析或贝叶斯程序分析均无直接交集;仅在广义 PL/编译背景上有微弱关联。引用 122 inbox
Yunong Shi, Nelson Leung, Pranav Gokhale, Zane Rossi, David I. Schuster, Henry Hoffmann, Frederic T. Chong
crossref: 2026-09-12

AI 速览

一句话:提出将多个量子逻辑操作聚合为最多10量子比特单元并定制控制脉冲的编译方法,显著降低量子程序延迟。

现有量子编程语言与编译器基于1/2量子比特门的量子汇编,再直接翻译为控制脉冲;逻辑ISA与物理实现不匹配,导致程序低效、高延迟。本文提出通用量子编译方法:将多个逻辑操作聚合为可同时操作至多10个量子比特的更大单元;在聚合上进行优化,包括寻找可交换中间操作以形成更高效调度,并为整个聚合而非单个门定制控制脉冲,从而实现高层量子软件与底层硬件的深度垂直整合。作者在超导量子架构模拟上评估若干近期重要量子应用,相比标准基于门的编译平均加速5倍,最高10倍;由于延迟直接影响量子计算可行性,该方法不仅提升性能,也可能使量子计算更早实用。

问题
逻辑1/2量子比特门ISA与底层物理控制脉冲实现不匹配,直接翻译逻辑指令会导致低效、高延迟的量子程序。
方法
将多个逻辑操作聚合为最多操作10个量子比特的单元,并在聚合级别优化可交换中间操作调度、定制聚合级控制脉冲。
评估
在超导量子架构模拟上对重要近期量子应用进行评估,相比标准基于门的编译平均加速5倍,最高加速10倍。
原文摘要(Abstract)

Recent developments in engineering and algorithms have made real-world applications in quantum computing possible in the near future. Existing quantum programming languages and compilers use a quantum assembly language composed of 1- and 2-qubit (quantum bit) gates. Quantum compiler frameworks translate this quantum assembly to electric signals (called control pulses) that implement the specified computation on specific physical devices. However, there is a mismatch between the operations defined by the 1- and 2-qubit logical ISA and their underlying physical implementation, so the current practice of directly translating logical instructions into control pulses results in inefficient, high-latency programs. To address this inefficiency, we propose a universal quantum compilation methodology that aggregates multiple logical operations into larger units that manipulate up to 10 qubits at a time. Our methodology then optimizes these aggregates by (1) finding commutative intermediate operations that result in more efficient schedules and (2) creating custom control pulses optimized for the aggregate (instead of individual 1- and 2-qubit operations). Compared to the standard gate-based compilation, the proposed approach realizes a deeper vertical integration of high-level quantum software and low-level, physical quantum hardware. We evaluate our approach on important near-term quantum applications on simulations of superconducting quantum architectures. Our proposed approach provides a mean speedup of $5\times$, with a maximum of $10\times$. Because latency directly affects the feasibility of quantum computation, our results not only improve performance but also have the potential to enable quantum computation sooner than otherwise possible.

链接与引用

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BibTeX
@inproceedings{paperbot4905,
  title = {Optimized Compilation of Aggregated Instructions for Realistic Quantum Computers},
  author = {Yunong Shi and Nelson Leung and Pranav Gokhale and Zane Rossi and David I. Schuster and Henry Hoffmann and Frederic T. Chong},
  booktitle = {ASPLOS},
  year = {2019},
  doi = {10.1145/3297858.3304018}
}