paperbot · PL 论文追踪

全部论文 待读 收藏

P2 Dimensionality-Aware Redundant SIMT Instruction Elimination

维度感知的冗余 SIMT 指令消除
ASPLOS Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems2020匹配度 1/10 · 论文聚焦 GPU 体系结构中的 SIMT 冗余指令消除,属于编译器与体系结构优化,未涉及用户关注的大模型/Agent、静态分析、浮点程序分析或贝叶斯程序分析。引用 12 inbox
Tsung Tai Yeh, Roland N. Green, Timothy G. Rogers
crossref: 2026-09-12

AI 速览

一句话:提出非推测的 DARSIE 机制,利用编译期标记与内核启动信息在取指前跳过 GPU 中多维线程块间的冗余 SIMT 指令。

在众核多线程架构中,不同线程冗余执行具有相同操作数的同一指令是显著的效率来源。本文提出维度感知的冗余 SIMT 指令消除(DARSIE),一种非推测的指令跳过机制,用于减少 GPU 中的冗余操作。DARSIE 结合编译器提供的静态标记与内核启动时获得的信息,在冗余指令被取指之前将其跳过,从而使其不进入流水线。该工作基于一个新观察:在多维线程块中,warp 指令之间存在大量冗余。摘要未给出具体性能数据,但机制设计旨在降低冗余执行开销。

问题
GPU 等大规模多线程架构中,不同线程冗余执行相同指令与操作数造成显著低效。
方法
DARSIE 利用编译器静态标记与内核启动信息,在取指阶段之前跳过冗余指令,是一种非推测式指令跳过机制,并利用多维线程块中 warp 指令间的冗余。
评估
摘要未详细说明评估方法;论文主要通过识别多维线程块中 warp 级冗余并设计非推测式跳过机制来减少冗余操作。
原文摘要(Abstract)

In massively multithreaded architectures, redundantly executing the same instruction with the same operands in different threads is a significant source of inefficiency. This paper introduces Dimensionality-Aware Redundant SIMT Instruction Elimination (DARSIE), a non-speculative instruction skipping mechanism to reduce redundant operations in GPUs. DARSIE uses static markings from the compiler and information obtained at kernel launch time to skip redundant instructions before they are fetched, keeping them out of the pipeline. DARSIE exploits a new observation that there is significant redundancy across warp instructions in multi-dimensional threadblocks.

链接与引用

DOI 原文 ·

BibTeX
@inproceedings{paperbot5398,
  title = {Dimensionality-Aware Redundant SIMT Instruction Elimination},
  author = {Tsung Tai Yeh and Roland N. Green and Timothy G. Rogers},
  booktitle = {ASPLOS},
  year = {2020},
  doi = {10.1145/3373376.3378520}
}