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P2 NeuMMU

NeuMMU:为 NPU 定制的内存管理单元
ASPLOS Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems2020匹配度 1/10 · 该论文研究 NPU 的地址转换与 MMU 体系结构,属于硬件/体系结构方向;与用户的静态分析、LLM/Agent、浮点程序分析和贝叶斯程序分析等核心方向几乎没有直接交集。引用 29 inbox
Bongjoon Hyun, Youngeun Kwon, Yujeong Choi, John Kim, Minsoo Rhu
crossref: 2026-09-12

AI 速览

一句话:提出为 NPU 定制的地址转换 MMU,解耦虚拟/物理地址并仅带来极低性能开销。

随着 DNN 对计算与内存需求增长,NPU 正被广泛用于加速,并有望像 GPU 一样成为异构体系结构中的一等处理器。本文主张在 NPU 中支持地址转换,以解耦虚拟与物理内存地址空间。作者通过数据驱动的应用刻画研究,根因分析了既有以 GPU 为中心的地址转换方案的若干局限,并据此提出一种面向 NPU 定制的内存管理单元(MMU)。评估表明,与理想的 oracle MMU 设计点相比,该方案的性能开销平均仅为 0.06%。

问题
NPU 是否需要以及如何支持地址转换,以解耦虚拟与物理地址空间;既有 GPU 中心地址转换方案对 NPU 存在局限。
方法
通过数据驱动应用刻画定位问题根源,并设计面向 NPU 的定制 MMU。
评估
与 oracle MMU 设计点对比,所提方案平均性能开销仅 0.06%。
原文摘要(Abstract)

To satisfy the compute and memory demands of deep neural networks (DNNs), neural processing units (NPUs) are widely being utilized for accelerating DNNs. Similar to how GPUs have evolved from a slave device into a mainstream processor architecture, it is likely that NPUs will become first-class citizens in this fast-evolving heterogeneous architecture space. This paper makes a case for enabling address translation in NPUs to decouple the virtual and physical memory address space. Through a careful data-driven application characterization study, we root-cause several limitations of prior GPU-centric address translation schemes and propose a memory management unit (MMU) that is tailored for NPUs. Compared to an oracular MMU design point, our proposal incurs only an average 0.06% performance overhead.

链接与引用

DOI 原文 ·

BibTeX
@inproceedings{paperbot5413,
  title = {NeuMMU},
  author = {Bongjoon Hyun and Youngeun Kwon and Yujeong Choi and John Kim and Minsoo Rhu},
  booktitle = {ASPLOS},
  year = {2020},
  doi = {10.1145/3373376.3378494}
}