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P2 A Computational Temporal Logic for Superconducting Accelerators

面向超导加速器的计算时序逻辑
ASPLOS Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems2020匹配度 2/10 · 论文聚焦超导加速器的脉冲到达时间计算与计算时序逻辑的形式化语义,属于体系结构与形式逻辑交叉,与用户关注的 PL/AI、静态分析、LLM/Agent、浮点或贝叶斯程序分析等核心方向无直接关联;仅在形式化验证/时序逻辑方法上有较弱的间接联系。引用 47 inbox
Georgios Tzimpragos, Dilip Vasudevan, Nestan Tsiskaridze, George Michelogiannakis, Advait Madhavan, Jennifer Volk, John Shalf, Timothy Sherwood
crossref: 2026-09-12

AI 速览

一句话:提出以脉冲到达时间为核心的计算时序逻辑,使超导逻辑能原生异步执行有用计算并形式化其语义。

传统硬件设计以电平驱动逻辑为基础,而最具前景的超导技术天然支持脉冲驱动逻辑,二者之间存在语义鸿沟;脉冲仅在瞬间通过通道,若要让输入脉冲同时到达“逻辑门”以维持纯布尔求值假象,会带来巨大工程负担。本文探索以到达时间作为超导逻辑更原生的计算方式。作者基于延迟计算的思想,让超导逻辑直接计算脉冲到达之间的时序关系,并通过验证社区所用时序谓词逻辑的函数式扩展来形式化这些计算关系。所得架构可异步运行,并能描述真实且有意义的计算。论文结合详细模拟电路模型、对抽象的形式化分析以及在若干超导加速器场景中的评估,验证了该假设。

问题
超导逻辑天然是脉冲驱动的,而传统硬件设计建立在电平驱动逻辑之上,二者之间存在“语义鸿沟”;同时,迫使脉冲同步到达以模拟布尔求值非常困难。
方法
以脉冲到达时间作为原生计算原语,基于延迟计算让超导逻辑直接计算脉冲到达之间的时序关系,并用时序谓词逻辑的函数式扩展形式化这些关系,进而设计可异步运行的架构。
评估
通过详细模拟电路模型、对抽象的形式化分析,以及在多个超导加速器场景中的评估来验证所提方法。
原文摘要(Abstract)

Superconducting logic offers the potential to perform computation at tremendous speeds and energy savings. However, a "semantic gap" lies between the level-driven logic that traditional hardware designs accept as a foundation and the pulse-driven logic that is naturally supported by the most compelling superconducting technologies. A pulse, unlike a level signal, will fire through a channel for only an instant. Arranging the network of superconducting components so that input pulses always arrive simultaneously to "logic gates'' to maintain the illusion of Boolean-only evaluation is a significant engineering hurdle. In this paper, we explore computing in a new and more native tongue for superconducting logic: time of arrival. Building on recent work in delay-based computations we show that superconducting logic can naturally compute directly over temporal relationships between pulse arrivals, that the computational relationships between those pulse arrivals can be formalized through a functional extension to a temporal predicate logic used in the verification community, and that the resulting architectures can operate asynchronously and describe real and useful computations. We verify our hypothesis through a combination of detailed analog circuit models, a formal analysis of our abstractions, and an evaluation in the context of several superconducting accelerators.

链接与引用

DOI 原文 ·

BibTeX
@inproceedings{paperbot5415,
  title = {A Computational Temporal Logic for Superconducting Accelerators},
  author = {Georgios Tzimpragos and Dilip Vasudevan and Nestan Tsiskaridze and George Michelogiannakis and Advait Madhavan and Jennifer Volk and John Shalf and Timothy Sherwood},
  booktitle = {ASPLOS},
  year = {2020},
  doi = {10.1145/3373376.3378517}
}