一句话：提出开源异构ISA硬件框架BYOC，通过TRI支持多ISA核心、可扩展缓存一致性与SMP Linux，并在FPGA上验证。
异构体系结构与异构ISA研究缺乏可修改的实验系统和硬件框架。本文提出BYOC，一个“自带核心”的开源硬件框架。它提供可扩展缓存一致性系统，开箱支持RISC-V 32/64位、x86和SPARCv9四种ISA，已连接十种核心，支持多个松耦合加速器与SMP Linux。BYOC引入Transaction-Response Interface（TRI），简化新核心、新ISA和内存接口的集成。作者在FPGA上运行多种多ISA设计，刻画通信开销，讨论架构权衡。BYOC可作为异构ISA架构、系统软件和编译器研究的平台。
Heterogeneous architectures and heterogeneous-ISA designs are growing areas of computer architecture and system software research. Unfortunately, this line of research is significantly hindered by the lack of experimental systems and modifiable hardware frameworks. This work proposes BYOC, a "Bring Your Own Core" framework that is specifically designed to enable heterogeneous-ISA and heterogeneous system research. BYOC is an open-source hardware framework that provides a scalable cache coherence system, that includes out-of-the-box support for four different ISAs (RISC-V 32-bit, RISC-V 64-bit, x86, and SPARCv9) and has been connected to ten different cores. The framework also supports multiple loosely coupled accelerators and is a fully working system supporting SMP Linux. The Transaction-Response Interface (TRI) introduced with BYOC has been specifically designed to make it easy to add in new cores with new ISAs and memory interfaces. This work demonstrates multiple multi-ISA designs running on FPGA and characterises the communication costs. This work describes many of the architectural design trade-offs for building such a flexible system. BYOC is well suited to be the premiere platform for heterogeneous-ISA architecture, system software, and compiler research.
@inproceedings{paperbot5437,
title = {BYOC},
author = {Jonathan Balkind and Katie Lim and Michael Schaffner and Fei Gao and Grigory Chirkov and Ang Li and Alexey Lavrov and Tri M. Nguyen and Yaosheng Fu and Florian Zaruba and Kunal Gulati and Luca Benini and David Wentzlaff},
booktitle = {ASPLOS},
year = {2020},
doi = {10.1145/3373376.3378479}
}