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P2 HaRMony

HaRMony:面向异构可靠性内存的 QoS 感知节能框架
ASPLOS Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems2020匹配度 0/10 · 论文聚焦 DRAM 异构可靠性内存、虚拟化栈与 QoS 能耗管理,属于体系结构/系统方向,与用户关注的静态分析、LLM/Agent、浮点程序分析或贝叶斯程序分析均无交集。引用 14 inbox
Konstantinos Tovletoglou, Lev Mukhanov, Dimitrios S. Nikolopoulos, Georgios Karakonstantis
crossref: 2026-09-12

AI 速览

一句话:首次在完整虚拟化栈中实现并评估异构可靠性内存框架 HaRMony,结合 QoS 感知策略降低 DRAM 与系统能耗。

DRAM 能耗已占服务器系统功耗 40% 以上,放松 DRAM 电路参数虽可节能却会引入故障;已有异构可靠性内存方案多停留在模拟器,缺乏完整软件栈与 OS 能耗管理策略。本文在具备完整虚拟化栈的服务器上首次实现并评估 HaRMony 框架,通过软件内存交错克服默认硬件限制,并经 QEMU-KVM 暴露两种策略:依据用户可用性 QoS 选择最节能 DRAM 参数,以及允许用户限制保护并分配数据到不同可靠性域。在 ARMv8 服务器、28 个基准上,禁用硬件交错的性能开销从 29.3% 降至 1.1%,DRAM 能耗平均降低 17.7%,系统能耗降低 8.6%;集成 QoS 感知 scaling governor 可动态调整参数,在极端温度下仍满足 QoS 并降低 8.4% 系统能耗。

问题
服务器 DRAM 能耗占比高,放松电路参数节能会带来故障风险;已有异构可靠性内存方案未在真实完整软件栈与 OS 能耗管理策略中实现评估。
方法
实现 HaRMony 异构可靠性内存框架,引入软件内存交错以绕过硬件限制,并通过 QEMU-KVM 暴露基于 QoS 的 DRAM 参数选择与可限保护的数据分配策略。
评估
在 ARMv8 服务器及 28 个基准上测试,将禁用硬件交错的性能开销从 29.3% 降至 1.1%,平均节省 17.7% DRAM 能耗和 8.6% 系统能耗,并验证 QoS 感知 governor 在极端温度下动态调参、节省 8.4% 能耗。
原文摘要(Abstract)

The explosive growth of data increases the storage needs, especially within servers, making DRAM responsible for more than 40% of the total system power. Such a reality has made researchers focus on energy saving schemes that relax the pessimistic DRAM circuit parameters at the cost of potential faults. In an effort to limit the resultant risk of critical data disruption, new methods were introduced that split DRAM into domains with varying reliability and power. The benefits of such schemes may have been showcased on simulators but have neither been implemented on real systems with a complete software stack, nor have been combined with any energy-reliability OS management policies. In this paper, we are the first to implement and evaluate HaRMony, a heterogeneous-reliability memory framework, in conjunction with QoS-aware energy management policies on a server with a complete virtualization stack. HaRMony overcomes the practical restrictions stemming from default hardware specifications, which were neglected in prior works, by introducing a software-based memory interleaving scheme. Furthermore, we expose the capabilities of HaRMony to the QEMU-KVM hypervisor through two unique policies. The first policy enables the hypervisor to seek the most power efficient DRAM circuit parameters based on the server availability requested by the user. The second policy enables users to exploit the inherent application error-resiliency by allowing them to limit the error protection mechanisms and allocate data structures on variably-reliable memory domains. Our evaluation shows that HaRMony reduces the performance overhead incurred due to disabling hardware interleaving from 29.3% down to 1.1% and leads to 17.7% DRAM energy savings and 8.6% total system energy savings on average in case of native execution of 28 benchmarks on an ARMv8-based server. Finally, we demonstrate that our QoS-aware scaling governor integrated with QEMU-KVM can dynamically scale the DRAM parameters, while reducing the system energy by 8.4% and meeting the targeted QoS even under extreme temperatures.

链接与引用

DOI 原文 · PDF(开放获取) ·

BibTeX
@inproceedings{paperbot5444,
  title = {HaRMony},
  author = {Konstantinos Tovletoglou and Lev Mukhanov and Dimitrios S. Nikolopoulos and Georgios Karakonstantis},
  booktitle = {ASPLOS},
  year = {2020},
  doi = {10.1145/3373376.3378489}
}