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P2 HeteroRefactor

HeteroRefactor
ICSE Proceedings of the ACM/IEEE 42nd International Conference on Software Engineering2020匹配度 2/10 · 该论文属于编译优化与程序自动重构方向,可能涉及静态分析技术,但其目标是提升 FPGA HLS 对指针、内存管理和递归的兼容性,与用户关注的 ML/Agentic 程序静态分析、LLM 与程序分析交叉、浮点程序分析或贝叶斯程序分析均无直接关系。引用 14 inbox
Jason Lau, Aishwarya Sivaraman, Qian Zhang, Muhammad Ali Gulzar, Jason Cong, Miryung Kim
crossref: 2026-09-12

AI 速览

一句话:针对 FPGA HLS 难以支持含指针、内存管理和递归的内核程序,提出自动重构以提升 HLS 兼容性并减少手工优化。

FPGA 异构计算能为许多应用带来数量级的能效提升,但硬件知识门槛使使用者受限。高层综合(HLS)将编程抽象从硬件语言提升到 C/C++,却通常无法编译和生成含指针、内存管理与递归的内核加速器,需要人工重构才能兼容 HLS。此外,专家还需大量手工优化以提高资源效率,这影响最高运行频率、并行化和功耗效率。论文 HeteroRefactor 针对这些限制,探索自动重构以降低 HLS 使用门槛并减少手工优化负担;给定摘要未展开具体方法与实验评估。

问题
FPGA 异构计算虽能显著提升能效,但 HLS 工具无法直接编译含指针、动态内存管理和递归的内核程序,且专家需手工优化资源效率,限制了其广泛应用。
方法
标题与摘要指向 HeteroRefactor,一种自动重构/转换思路,用于将不兼容 HLS 的内核程序改造为可综合形式并减轻手工优化;具体算法未在给定摘要中说明。
评估
给定摘要未报告评估设计或结果;仅列出了需改善的目标,包括资源效率、最高运行频率、并行化和功耗效率。
原文摘要(Abstract)

Heterogeneous computing with field-programmable gate-arrays (FPGAs) has demonstrated orders of magnitude improvement in computing efficiency for many applications. However, the use of such platforms so far is limited to a small subset of programmers with specialized hardware knowledge. High-level synthesis (HLS) tools made significant progress in raising the level of programming abstraction from hardware programming languages to C/C++, but they usually cannot compile and generate accelerators for kernel programs with pointers, memory management, and recursion, and require manual refactoring to make them HLS-compatible. Besides, experts also need to provide heavily handcrafted optimizations to improve resource efficiency, which affects the maximum operating frequency, parallelization, and power efficiency.

链接与引用

DOI 原文 · PDF(开放获取) ·

BibTeX
@inproceedings{paperbot5551,
  title = {HeteroRefactor},
  author = {Jason Lau and Aishwarya Sivaraman and Qian Zhang and Muhammad Ali Gulzar and Jason Cong and Miryung Kim},
  booktitle = {ICSE},
  year = {2020},
  doi = {10.1145/3377811.3380340}
}