一句话:构建多种 HDL 大型语料,发现硬件描述的自然性类似软件,并训练 VHDL 代码补全神经模型。
现有挖掘软件仓库研究几乎只关注 Java、C/C++ 等命令式语言,HDL 虽具有独特语法语义且硬件设计工具落后,却缺少公开语料与学习型工具。本文收集多种 HDL 的大型硬件描述语料,分析其特性,并用语言模型评估其自然性。结果显示,HDL 的自然性与命令式软件相似。作者进一步利用语料构建 VHDL 自动代码补全的深度学习模型,融入 HDL 特有性质:邻近并发信号赋值语句的相似性、内建并发性以及常用信号类型。这些特性使神经模型更有效,BLEU 达 37.3,较基于规则和神经基线提升 8–14 点。
Mining software repositories (MSR) has been shown effective for extracting data used to improve various software engineering tasks, including code completion, code repair, code search, and code summarization. Despite a large body of work on MSR, researchers have focused almost exclusively on repositories that contain code written in imperative programming languages, such as Java and C/C++. Unlike prior work, in this paper, we focus on mining publicly available hardware descriptions (HDs) written in hardware description languages (HDLs), such as VHDL. HDLs have unique syntax and semantics compared to popular imperative languages, and learning-based tools available to hardware designers are well behind those used in other application domains. We assembled large HD corpora consisting of source code written in several HDLs and report on their characteristics. Our language model evaluation reveals that HDs possess a high level of naturalness similar to software written in imperative languages. Further, by utilizing our corpora, we built several deep learning models for automated code completion in VHDL; our models take into account unique characteristics of HDLs, including similarities of nearby concurrent signal assignment statements, in-built concurrency, and the frequently used signal types. These characteristics led to more effective neural models, achieving a BLEU score of 37.3, an 8-14-point improvement over rule-based and neural baselines.
DOI 原文 ·
@inproceedings{paperbot5762,
title = {On the naturalness of hardware descriptions},
author = {Jaeseong Lee and Pengyu Nie and Junyi Jessy Li and Milos Gligoric},
booktitle = {FSE},
year = {2020},
doi = {10.1145/3368089.3409692}
}