一句话：提出借助软件编译器为基于规则的高级硬件设计语言提供高效仿真与调试支持。
基于规则的高级硬件设计语言（RHDL）通过便捷抽象提升开发者生产力，而先进编译技术能保持抽象成本低廉，生成面积和时序优异的电路。然而，这类语言的仿真与调试支持往往不足。本文提出利用软件编译器（而非专用硬件仿真器）来实现 RHDL 的有效仿真与调试，从而复用成熟的编译器基础设施与优化。摘要仅简述了 RHDL 的动机与编译优势，未给出具体实现机制与实验评估数据，但标题表明核心贡献在于将软件编译器技术迁移至硬件语言的仿真调试场景。该方法有望在保持电路质量的同时，改善开发者的调试体验。
Rule-based hardware-design languages (RHDLs) promise to enhance developer productivity by offering convenient abstractions. Advanced compiler technology keeps the cost of these abstractions low, generating circuits with excellent area and timing properties.
@inproceedings{paperbot6096,
title = {Effective simulation and debugging for a high-level hardware language using software compilers},
author = {Clément Pit-Claudel and Thomas Bourgeat and Stella Lau and Arvind and Adam Chlipala},
booktitle = {ASPLOS},
year = {2021},
doi = {10.1145/3445814.3446720}
}