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P2 Streamline: a fast, flushless cache covert-channel attack by enabling asynchronous collusion

Streamline:一种快速、无 flush 的缓存隐蔽信道攻击,通过异步合谋实现
ASPLOS Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems2021匹配度 0/10 · 该论文研究的是硬件缓存隐蔽信道攻击协议与安全隐私,属于体系结构/安全方向,完全不涉及静态分析、程序分析、LLM/Agent、浮点程序分析或贝叶斯程序分析。引用 36 inbox
Gururaj Saileshwar, Christopher W. Fletcher, Moinuddin Qureshi
crossref: 2026-09-12

AI 速览

一句话:提出 Streamline,一种无需 flush 指令、通过发送方与接收方异步合谋实现的高速缓存隐蔽信道攻击协议。

缓存隐蔽信道利用处理器缓存等共享硬件资源的竞争,在系统中相互合谋的进程间传递信息。近年基于缓存行 flush 指令的 Flush+Reload、Flush+Flush 等成为最快的跨核攻击,但它们要求 flush 指令,并且发送方与接收方必须在每个比特周期紧密同步以维持低错误率,这限制了适用场景与比特率。论文提出 Streamline,一种快速、无 flush 的缓存隐蔽信道攻击,通过实现异步合谋来解除上述协议约束。标题与摘要强调,现有攻击的局限并非源于根本硬件限制,而是协议设计;Streamline 试图在无需 flush 和无需逐比特同步的情况下保持高速隐蔽通信。摘要未报告具体评估结果。

问题
现有缓存隐蔽信道攻击依赖 flush 指令,并要求发送方与接收方在每个比特周期紧密同步,导致适用性受限且比特率难以提升;该局限源于协议设计而非硬件。
方法
Streamline 通过无 flush 指令的设计与异步合谋机制,使发送方和接收方无需逐比特同步即可进行缓存隐蔽通信。
评估
摘要未描述具体评估方法或实验数据,未给出比特率、错误率等结果。
原文摘要(Abstract)

Covert-channel attacks exploit contention on shared hardware resources such as processor caches to transmit information between colluding processes on the same system. In recent years, covert channels leveraging cacheline-flush instructions, such as Flush+Reload and Flush+Flush, have emerged as the fastest cross-core attacks. However, current attacks are limited in their applicability and bit-rate not due to any fundamental hardware limitations, but due to their protocol design requiring flush instructions and tight synchronization between sender and receiver, where both processes synchronize every bit-period to maintain low error-rates.

链接与引用

DOI 原文 ·

BibTeX
@inproceedings{paperbot6124,
  title = {Streamline: a fast, flushless cache covert-channel attack by enabling asynchronous collusion},
  author = {Gururaj Saileshwar and Christopher W. Fletcher and Moinuddin Qureshi},
  booktitle = {ASPLOS},
  year = {2021},
  doi = {10.1145/3445814.3446742}
}