一句话：提出向量化器生成器 VeGen，可自动生成面向 SIMD 及非 SIMD 向量指令的向量化器。
向量指令在现代处理器中无处不在，但传统编译器自动向量化技术主要面向 SIMD 指令，难以建模图像处理、数字信号处理和机器学习等领域的非 SIMD 向量指令。为支持这些指令，编译器开发者不得不编写复杂且专用的 peephole 优化，耗费大量开发时间却仍难以覆盖。随着向量指令集快速演进，编译器愈发难以跟上硬件能力。为此，作者提出 VeGen——一个向量化器生成器，能够自动生成既针对 SIMD、也支持更广范围向量指令的向量化器，从而降低适配新向量指令的开发负担。摘要未给出具体的实现机制与实验评估细节。
Vector instructions are ubiquitous in modern processors. Traditional compiler auto-vectorization techniques have focused on targeting single instruction multiple data (SIMD) instructions. However, these auto-vectorization techniques are not sufficiently powerful to model non-SIMD vector instructions, which can accelerate applications in domains such as image processing, digital signal processing, and machine learning. To target non-SIMD instruction, compiler developers have resorted to complicated, ad hoc peephole optimizations, expending significant development time while still coming up short. As vector instruction sets continue to rapidly evolve, compilers cannot keep up with these new hardware capabilities.