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P2 NOREBA: a compiler-informed non-speculative out-of-order commit processor

NOREBA:一种编译器信息驱动的非推测乱序提交处理器
ASPLOS Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems2021匹配度 1/10 · 论文属于计算机体系结构/处理器微架构方向,核心是利用编译器信息优化乱序提交与资源回收,与用户关注的静态分析、LLM/Agent、浮点程序分析、贝叶斯程序分析均无直接交集。仅“编译器信息”与PL/编译有非常弱的关联。引用 7 inbox
Ali Hajiabadi, Andreas Diavastos, Trevor E. Carlson
crossref: 2026-09-12

AI 速览

一句话:提出 NOREBA,利用编译器信息实现非推测乱序提交,以更早回收关键资源并提升处理器性能。

现代超标量处理器采用乱序执行但按序提交,以保证精确异常处理和安全指令退休。按序提交十分保守,使关键资源被占用远超必要时间,严重限制通用处理器性能。允许提前回收关键资源的机制可提升性能,其中乱序提交是一种方案,但传统上因需要低效复杂硬件来保证安全退休和精确异常而难以实现。NOREBA 提出一种编译器信息辅助的非推测乱序提交处理器,旨在利用编译器信息降低乱序提交的硬件复杂度与推测风险,从而在保证正确性的前提下提前提交并释放资源。摘要未报告具体性能数据与评估结果。

问题
按序提交为保证精确异常和安全退休而过于保守,导致关键资源占用过久、性能受限;传统乱序提交又依赖低效复杂硬件。
方法
NOREBA 利用编译器信息实现非推测的乱序提交,试图在保证安全退休与精确异常的同时提前回收关键资源。
评估
摘要未给出具体评估方法与实验结果,仅能从标题与摘要判断其面向处理器架构设计。
原文摘要(Abstract)

Modern superscalar processors execute instructions out-of-order, but commit them in program order to provide precise exception handling and safe instruction retirement. However, in-order instruction commit is highly conservative and holds on to critical resources far longer than necessary, severely limiting the reach of general-purpose processors, ultimately reducing performance. Solutions that allow for efficient, early reclamation of these critical resources could seize the opportunity to improve performance. One such solution is out-of-order commit, which has traditionally been challenging due to inefficient, complex hardware used to guarantee safe instruction retirement and provide precise exception handling.

链接与引用

DOI 原文 · PDF(开放获取) ·

BibTeX
@inproceedings{paperbot6143,
  title = {NOREBA: a compiler-informed non-speculative out-of-order commit processor},
  author = {Ali Hajiabadi and Andreas Diavastos and Trevor E. Carlson},
  booktitle = {ASPLOS},
  year = {2021},
  doi = {10.1145/3445814.3446726}
}