一句话：提出混合时序分析框架 MCAD，结合 QEMU 指令追踪与静态吞吐量估计，实现快速且精确的差分性能预测。
差分吞吐量估计（预测软件改动对性能的影响）对汽车、航空、工业控制等依赖精确时序边界的系统至关重要，但开发者常无法在目标硬件上直接测量，只能依赖指令吞吐量估计工具。现有技术分两类：动态方法用周期精确的微架构模拟器仿真执行，精度高但周转时间长、配置复杂；静态方法无需具体运行时环境，开销低但缺乏动态运行时信息，且多局限于单个基本块的预测，需要人工构造关键指令序列。本文提出 MCAD，一种混合时序分析框架，从 QEMU 收集指令轨迹及动态运行时信息，流式传输给静态吞吐量估计器，从而避免重量级周期精确仿真。评估表明，MCAD 可扩展到 FFmpeg、Clang 等百万指令级真实应用，与 x86 和 ARM 硬件性能计数器真值相比几何平均误差小于 3%，周转时间比精度相近的现有方法降低数个数量级。
Differential throughput estimation, i.e., predicting the performance impact of software changes, is critical when developing applications that rely on accurate timing bounds, such as automotive, avionic, or industrial control systems. However, developers often lack access to the target hardware to perform on-device measurements, and hence rely on instruction throughput estimation tools to evaluate performance impacts. State-of-the-art techniques broadly fall into two categories: dynamic and static. Dynamic approaches emulate program execution using cycle-accurate microarchitectural simulators resulting in high precision at the cost of long turnaround times and convoluted setups. Static approaches reduce overhead by predicting cycle counts outside of a concrete runtime environment. However, they are limited by the lack of dynamic runtime information and mostly focus on predictions over single basic blocks which requires developers to manually construct critical instruction sequences. We present MCAD, a hybrid timing analysis framework that combines the advantages of dynamic and static approaches. Instead of relying on heavyweight cycle-accurate emulation, MCAD collects instruction traces along with dynamic runtime information from QEMU and streams them to a static throughput estimator. This allows developers to accurately estimate the performance impact of software changes for complete programs within minutes, reducing turnaround times by orders of magnitude compared to existing approaches with similar accuracy. Our evaluation shows that MCAD scales to real-world applications such as FFmpeg and Clang with millions of instructions, achieving < 3% geo. mean error compared to ground truth timings from hardware-performance counters on x86 and ARM machines.
DOI 原文 · arXiv · PDF（开放获取） · DBLP
@inproceedings{HsuHGMF23,
title = {A Highly Scalable, Hybrid, Cross-Platform Timing Analysis Framework Providing Accurate Differential Throughput Estimation via Instruction-Level Tracing},
author = {Min-Yih Hsu and Felicitas Hetzelt and David Gens and Michael Maitland and Michael Franz},
booktitle = {FSE},
year = {2023},
doi = {10.1145/3611643.3616246}
}