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P2 Learning to Check LTL Satisfiability and to Generate Traces via Differentiable Trace Checking

通过学习可微迹检查来检验 LTL 可满足性并生成迹
ISSTA Proceedings of the 33rd ACM SIGSOFT International Symposium on Software Testing and Analysis2024匹配度 4/10 · 论文属于“机器学习×形式化验证”的交叉,与用户 AI→PL 的大方向沾边,且兼具理论(可微 trace checking 模拟 LTL trace checking)与实现,符合偏好理论+工程的特点;但它使用的是自建神经网络而非 LLM/Agent,也不涉及程序静态分析、浮点程序分析或贝叶斯程序分析等具体追的问题,只在与核心方向相邻的逻辑求解层面重叠。引用 1 inbox
Weilin Luo, Pingjia Liang, Junming Qiu, Polong Chen, Hai Wan, Jianfeng Du, Weiyuan Fang
crossref: 2026-09-12

AI 速览

一句话:提出可微神经网络方法 VSCNet,将 LTL 可满足性检验与可满足迹生成(SAT-and-GET)统一为神经推理,兼顾精度与效率。

线性时序逻辑(LTL)可满足性检验具有 PSPACE-完全的高复杂度。近期神经网络方法虽能在多项式时间内近似判定可满足性,却缺乏在判定为可满足时给出可满足迹作为证据的能力,即 SAT-and-GET 问题。本文将该问题桥接到神经网络推理:核心理论贡献是证明精心设计的神经推理过程(称为神经迹检查)能够模拟 LTL 迹检查。基于此提出神经网络方法 VSCNet,借助可微神经迹检查,通过梯度下降同时学习可满足性检验与迹生成。实验验证了 VSCNet 的有效性:相比最先进的神经网络迹生成方法,语义准确率平均最高提升 41.68%;相比最先进的逻辑方法 nuXmv 与 Aalta,在大规模数据集上平均分别取得 186 倍和 3541 倍的加速。

问题
LTL 可满足性检验复杂度高(PSPACE-完全),而现有神经网络方法只能近似判定可满足性,无法在判定为可满足时生成作为证据的可满足迹,即 SAT-and-GET 问题。
方法
作者将 LTL 迹检查桥接到神经网络推理,证明所设计的“神经迹检查”过程能够模拟 LTL 迹检查,并提出基于可微神经迹检查的 VSCNet,通过梯度下降联合学习可满足性判定与迹生成。
评估
在数据集上对比最先进的神经网络迹生成方法与逻辑工具 nuXmv、Aalta:语义准确率平均最高提升 41.68%,在大规模数据集上平均分别加速 186 倍与 3541 倍。
原文摘要(Abstract)

Linear temporal logic (LTL) satisfiability checking has a high complexity, i.e., PSPACE-complete. Recently, neural networks have been shown to be promising in approximately checking LTL satisfiability in polynomial time. However, there is still a lack of neural network-based approach to the problem of checking LTL satisfiability and generating traces as evidence, simply called SAT-and-GET, where a satisfiable trace is generated as evidence if the given LTL formula is detected to be satisfiable. In this paper, we tackle SAT-and-GET via bridging LTL trace checking to neural network inference. Our key theoretical contribution is to show that a well-designed neural inference process, named after neural trace checking, is able to simulate LTL trace checking. We present a neural network-based approach VSCNet. Relying on the differentiable neural trace checking, VSCNet is able to learn both to check satisfiability and to generate traces via gradient descent. Experimental results confirm the effectiveness of VSCNet, showing that it significantly outperforms the state-of-the-art (SOTA) neural network-based approaches for trace generation, on average achieving up to 41.68% improvement in semantic accuracy. Besides, compared with the SOTA logic-based approach nuXmv and Aalta, VSCNet achieves averagely 186X and 3541X speedups on large-scale datasets, respectively.

链接与引用

DOI 原文 ·

BibTeX
@inproceedings{paperbot8471,
  title = {Learning to Check LTL Satisfiability and to Generate Traces via Differentiable Trace Checking},
  author = {Weilin Luo and Pingjia Liang and Junming Qiu and Polong Chen and Hai Wan and Jianfeng Du and Weiyuan Fang},
  booktitle = {ISSTA},
  year = {2024},
  doi = {10.1145/3650212.3680337}
}