一句话：提出软件定义地址映射，利用程序数据访问模式提升3D内存的通道级并行与带宽利用率。
3D堆叠内存（如HBM和HMC）凭借新并行架构提供数量级更高的带宽和显著增强的通道级并行（CLP）。然而，充分发挥CLP受限于内存控制器中的地址映射，因为带宽利用率高度依赖地址映射策略。更棘手的是，CLP对程序的数据访问模式非常敏感，而现有机制并未将程序访问模式暴露给操作系统或硬件。论文提出软件定义地址映射，以3D内存为案例，让软件信息参与地址映射决策，从而适配程序访问模式。摘要未报告具体评估结果与实验细节。
3D-stacking memory such as High-Bandwidth Memory (HBM) and Hybrid Memory Cube (HMC) provides orders of magnitude more bandwidth and significantly increased channel-level parallelism (CLP) due to its new parallel memory architecture. However, it is challenging to fully exploit the abundant CLP for performance as the bandwidth utilization is highly dependent on address mapping in the memory controller. Unfortunately, CLP is very sensitive to a program’s data access pattern, which is not made available to OS/hardware by existing mechanisms.