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P2 REVAMP: a systematic framework for heterogeneous CGRA realization

REVAMP:一种面向异构 CGRA 实现的系统化框架
ASPLOS Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems2022匹配度 1/10 · 该论文聚焦粗粒度可重构阵列(CGRA)的异构化设计与配套编译映射,属于体系结构和硬件编译优化;与研究画像关注的静态分析、LLM/Agent、浮点程序分析和贝叶斯程序分析几乎没有交集。引用 71 inbox
Thilini Kaushalya Bandara, Dhananjaya Wijerathne, Tulika Mitra, Li-Shiuan Peh
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:提出 REVAMP,自动为同构 CGRA 引入计算、网络与存储异构性,并生成配套编译映射,从而提升能效。

粗粒度可重构架构(CGRA)在性能、能效与灵活性之间取得良好平衡,但传统同构 CGRA 在映射不规则应用时会产生大量空闲资源,导致效率下降。本文提出 REVAMP,一个自动化设计空间探索框架:在给定目标应用集后,系统地为原本同构的 CGRA 探索并引入计算、网络与存储层面的异构性,使均匀架构转变为更不规则但能效更高的架构。由于 CGRA 依赖软件调度,REVAMP 还扩展了编译器支持,以便在推导出的异构 CGRA 上高效映射循环内核。作者在三种先进同构 CGRA 上评估该方法,结果显示,相比对应同构版本,推导出的异构架构可实现最高 52.4% 功耗降低、38.1% 面积降低和平均 36% 能耗降低,同时对所选内核性能影响很小。

问题
同构 CGRA 在映射不规则应用时资源利用率低、能效不佳,而引入异构性会带来架构与编译映射的复杂设计空间。
方法
提出 REVAMP 自动化设计空间探索框架,针对目标应用集系统地探索计算、网络和存储异构性,并扩展编译器支持以在生成的异构 CGRA 上映射循环内核。
评估
在三种先进同构 CGRA 上评估,对比其同构版本与对应异构变体及编译优化。
原文摘要(Abstract)

Coarse-Grained Reconfigurable Architectures (CGRAs) provide an excellent balance between performance, energy efficiency, and flexibility. However, increasingly sophisticated applications, especially on the edge devices, demand even better energy efficiency for longer battery life. Most CGRAs adhere to a canonical structure where a homogeneous set of processing elements and memories communicate through a regular interconnect due to the simplicity of the design. Unfortunately, the homogeneity leads to substantial idle resources while mapping irregular applications and creates inefficiency. We plan to mitigate the inefficiency by systematically and judiciously introducing heterogeneity in CGRAs in tandem with appropriate compiler support. We propose REVAMP, an automated design space exploration framework that helps architects uncover and add pertinent heterogeneity to a diverse range of originally homogeneous CGRAs when fed with a suite of target applications. REVAMP explores a comprehensive set of optimizations encompassing compute, network, and memory heterogeneity, thereby converting a uniform CGRA into a more irregular architecture with improved energy efficiency. As CGRAs are inherently software scheduled, any micro-architectural optimizations need to be partnered with corresponding compiler support, which is challenging with heterogeneity. The REVAMP framework extends compiler support for efficient mapping of loop kernels on the derived heterogeneous CGRA architectures. We showcase REVAMP on three state-of-the-art homogeneous CGRAs, demonstrating how REVAMP derives a heterogeneous variant of each homogeneous architecture, with its corresponding compiler optimizations. Our results show that the derived heterogeneous architectures achieve up to 52.4% power reduction, 38.1% area reduction, and 36% average energy reduction over the corresponding homogeneous versions with minimal performance impact for the selected kernel suite.

链接与引用

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BibTeX
@inproceedings{BandaraWMP22,
  title = {REVAMP: a systematic framework for heterogeneous CGRA realization},
  author = {Thilini Kaushalya Bandara and Dhananjaya Wijerathne and Tulika Mitra and Li-Shiuan Peh},
  booktitle = {ASPLOS},
  year = {2022},
  doi = {10.1145/3503222.3507772}
}