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P2 Pinned loads: taming speculative loads in secure processors

Pinned Loads:驯服安全处理器中的推测加载
ASPLOS Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems2022匹配度 1/10 · 该论文研究安全处理器中推测执行加载的微架构优化,属于计算机体系结构与硬件安全,与用户关注的 PL/AI、静态分析、LLM/Agent、浮点程序分析及贝叶斯程序分析等方向几乎没有交集。引用 10 inbox
Zirui Neil Zhao, Houxiang Ji, Adam Morrison, Darko Marinov, Josep Torrellas
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:提出 Pinned Loads 技术,让加载尽早免受内存一致性违规影响,加速可见点推进,使推测执行防御开销约降低 50%。

在推测执行安全框架中,指令到达可见点(VP)前仍可能受流水线冲刷影响;等待或保护 pre-VP 指令通常带来性能开销。本文旨在以低开销实现安全执行,核心是加速 VP 从旧指令向新指令推进。作者发现,加载指令的 VP 推进主要受限于必须等待不再可能发生内存一致性违规(MCV)。为此提出 Pinned Loads:在流水线中尽早将加载“钉住”,使其不受 MCV 影响,从而更快推进 VP 并降低防御方案开销。论文给出所需硬件以及两种在硬件成本与性能间权衡的设计。评估显示,将三种流行推测执行攻击防御方案与 Pinned Loads 结合后,在 SPEC17 和 SPLASH2/PARSEC 上的平均执行开销约降低 50%,SPEC17 上各防御方案的开销均显著下降。

问题
在推测执行安全框架中,如何避免 pre-VP 指令因等待或保护而带来高开销,并加速可见点(VP)推进。
方法
提出 Pinned Loads 硬件技术,让加载尽早对内存一致性违规(MCV)免疫,从而加快 VP 前进;给出所需硬件与两种设计。
评估
将三种流行防御方案与 Pinned Loads 结合,在 SPEC17 和 SPLASH2/PARSEC 上测量执行开销,平均降低约 50%。
原文摘要(Abstract)

In security frameworks for speculative execution, an instruction is said to reach its Visibility Point (VP) when it is no longer vulnerable to pipeline squashes. Before a potentially leaky instruction reaches its VP, it has to stall—unless a defense scheme such as invisible speculation provides protection. Unfortunately, either stalling or protecting the execution of pre-VP instructions typically has a performance cost. One way to attain low-overhead safe execution is to develop techniques that speed-up the advance of the VP from older to younger instructions. In this paper, we propose one such technique. We find that the progress of the VP for loads is mostly impeded by waiting until no memory consistency violations (MCVs) are possible. Hence, our technique, called , tries to make loads invulnerable to MCVs as early as possible—a process we call pinning the loads in the pipeline. The result is faster VP progress and a reduction in the execution overhead of defense schemes. In this paper, we describe the hardware needed by , and two possible designs with different tradeoffs between hardware requirements and performance. Our evaluation shows that is very effective: extending three popular defense schemes against speculative execution attacks with reduces their average execution overhead on SPEC17 and on SPLASH2/PARSEC applications by about 50%. For example, on SPEC17, the execution overhead of the three defense schemes decreases from to , from to , and from to .

链接与引用

DOI 原文 · DBLP

BibTeX
@inproceedings{ZhaoJ0MT22,
  title = {Pinned loads: taming speculative loads in secure processors},
  author = {Zirui Neil Zhao and Houxiang Ji and Adam Morrison and Darko Marinov and Josep Torrellas},
  booktitle = {ASPLOS},
  year = {2022},
  doi = {10.1145/3503222.3507724}
}