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P2 Vector instruction selection for digital signal processors using program synthesis

基于程序合成的数字信号处理器向量指令选择
ASPLOS Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems2022匹配度 2/10 · 该论文研究编译器后端指令选择与程序合成,属于传统编译优化范畴,与用户关注的静态分析、LLM/Agent 交叉、浮点程序分析及贝叶斯程序分析均无直接关联。虽涉及程序合成,但并非用户所关注的 LLM/Agent 驱动或分析类工作。引用 22 inbox
Maaz Bin Safeer Ahmad, Alexander J. Root, Andrew Adams, Shoaib Kamil, Alvin Cheung
crossref: 2026-09-12dblp: 2026-09-12

AI 速览

一句话:提出基于程序合成的指令选择算法,先将目标平台指令抽象为 uber-instruction,再通过提升与下降生成 DSP 机器码,性能最高提升 2.1 倍。

指令选择是优化编译器中最依赖目标平台的组件,现有方法要么使用脆弱且设计繁琐的模式匹配,要么受限于基于搜索方法的可扩展性。论文提出一种新的指令选择算法:首先将目标平台指令抽象为高层 uber-instruction,每条 uber-instruction 统一多条具体指令;然后利用程序合成将输入代码序列提升为语义等价的 uber-instruction 序列,再从 uber-instruction 下降为机器码。作者在 21 个真实基准上对数字信号处理器进行实验,结果表明该基于合成的指令选择算法能够为目标硬件生成指令序列,且合成代码相比同一平台上专业开发的优化编译器所生成的代码最高可快 2.1 倍。

问题
指令选择是优化编译器中最依赖目标平台的环节,现有模式匹配方法脆弱且设计繁琐,基于搜索的方法则受限于搜索算法的可扩展性。
方法
先将目标平台指令抽象为高层 uber-instruction,每条统一多条具体指令;再用程序合成将输入代码序列提升为语义等价的 uber-instruction 序列,并从 uber-instruction 下降为机器码。
评估
在 21 个真实基准上,为数字信号处理器生成指令序列,并与专业开发的同平台优化编译器进行性能对比,合成代码最高获得 2.1 倍加速。
原文摘要(Abstract)

Instruction selection, whereby input code represented in an intermediate representation is translated into executable instructions from the target platform, is often the most target-dependent component in optimizing compilers. Current approaches include pattern matching, which is brittle and tedious to design, or search-based methods, which are limited by scalability of the search algorithm. In this paper, we propose a new algorithm that first abstracts the target platform instructions into high-level uber-instructions, with each uber-instruction unifying multiple concrete instructions from the target platform. Program synthesis is used to lift input code sequences into semantically equivalent sequences of uber-instructions and then to lower from uber-instructions to machine code. Using 21 real-world benchmarks, we show that our synthesis-based instruction selection algorithm can generate instruction sequences for a hardware target, with the synthesized code performing up to 2.1x faster as compared to code generated by a professionally-developed optimizing compiler for the same platform.

链接与引用

DOI 原文 · PDF(开放获取) · DBLP

BibTeX
@inproceedings{AhmadRAKC22,
  title = {Vector instruction selection for digital signal processors using program synthesis},
  author = {Maaz Bin Safeer Ahmad and Alexander J. Root and Andrew Adams and Shoaib Kamil and Alvin Cheung},
  booktitle = {ASPLOS},
  year = {2022},
  doi = {10.1145/3503222.3507714}
}